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authorAdrian Calianu <adrian.calianu@enea.com>2016-04-26 13:22:23 +0200
committerCatalina Focsa <catalina.focsa@enea.com>2016-04-26 17:34:36 +0200
commitac5e03afa3d343eefbc30a73bf6447c3e8b330bf (patch)
tree35bdbec1e598ab91e631d596cd21bedaf76e5a7f
parentbde3b9305a5a45b85a6027b42562aa38d8fba8ef (diff)
downloadmeta-enea-bsp-arm-ac5e03afa3d343eefbc30a73bf6447c3e8b330bf.tar.gz
Add ls1021aiot machine
This is replacing the ls1021atwr machine support. Signed-off-by: Adrian Calianu <adrian.calianu@enea.com> Signed-off-by: Catalina Focsa <catalina.focsa@enea.com>
-rw-r--r--conf/machine/ls1021aiot.conf17
-rw-r--r--recipes-kernel/linux/linux-ls1/ls1021a-iot.dts1102
-rw-r--r--recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts892
-rw-r--r--recipes-kernel/linux/linux-ls1_3.12.bbappend7
4 files changed, 1123 insertions, 895 deletions
diff --git a/conf/machine/ls1021aiot.conf b/conf/machine/ls1021aiot.conf
new file mode 100644
index 0000000..511d5f3
--- /dev/null
+++ b/conf/machine/ls1021aiot.conf
@@ -0,0 +1,17 @@
1#@TYPE: Machine
2#@NAME: Freescale LS1021A-IoT board
3#@SOC: ls102xa
4#@DESCRIPTION: Machine configuration for running LS1021A-IoT in 32-bit mode
5
6require conf/machine/include/qoriq-arm.inc
7require conf/machine/include/tune-cortexa7.inc
8
9SOC_FAMILY = "ls102xa"
10
11QE_UCODE="iram_Type_A_LS1021a_r1.0.bin"
12
13KERNEL_DEVICETREE ?= "ls1021a-iot.dtb"
14
15SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1 115200;ttyEHV0 115200;ttyLP0 115200;ttyAMA0"
16SERIAL_CONSOLES_CHECK ?= "${SERIAL_CONSOLES}"
17USE_VT ?= "0"
diff --git a/recipes-kernel/linux/linux-ls1/ls1021a-iot.dts b/recipes-kernel/linux/linux-ls1/ls1021a-iot.dts
new file mode 100644
index 0000000..d8ba94f
--- /dev/null
+++ b/recipes-kernel/linux/linux-ls1/ls1021a-iot.dts
@@ -0,0 +1,1102 @@
1/dts-v1/;
2
3/ {
4 #address-cells = <0x2>;
5 #size-cells = <0x2>;
6 compatible = "fsl,ls1021a";
7 interrupt-parent = <0x1>;
8 model = "LS1021A IOT Board";
9
10 chosen {
11 };
12
13 aliases {
14 serial0 = "/soc/serial@2950000";
15 serial1 = "/soc/serial@2960000";
16 serial2 = "/soc/serial@2970000";
17 serial3 = "/soc/serial@2980000";
18 serial4 = "/soc/serial@2990000";
19 serial5 = "/soc/serial@29a0000";
20 ethernet0 = "/soc/ethernet@2d10000";
21 ethernet1 = "/soc/ethernet@2d50000";
22 ethernet2 = "/soc/ethernet@2d90000";
23 sysclk = "/soc/clocking@1ee1000/sysclk";
24 gpio0 = "/soc/gpio@2300000";
25 gpio1 = "/soc/gpio@2310000";
26 gpio2 = "/soc/gpio@2320000";
27 gpio3 = "/soc/gpio@2330000";
28 crypto = "/soc/crypto@1700000";
29 };
30
31 memory {
32 device_type = "memory";
33 reg = <0x0 0x0 0x0 0x0>;
34 };
35
36 memory@80000000 {
37 device_type = "memory";
38 reg = <0x0 0x80000000 0x0 0x20000000>;
39 };
40
41 cpus {
42 #address-cells = <0x1>;
43 #size-cells = <0x0>;
44
45 cpu@f00 {
46 compatible = "arm,cortex-a7";
47 device_type = "cpu";
48 reg = <0xf00>;
49 clocks = <0x2>;
50 };
51
52 cpu@f01 {
53 compatible = "arm,cortex-a7";
54 device_type = "cpu";
55 reg = <0xf01>;
56 clocks = <0x2>;
57 };
58 };
59
60 timer {
61 compatible = "arm,armv7-timer";
62 interrupts = <0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xa 0x308>;
63 };
64
65 pmu {
66 compatible = "arm,cortex-a7-pmu";
67 interrupts = <0x0 0x8a 0x4 0x0 0x8b 0x4>;
68 };
69
70 soc {
71 compatible = "simple-bus";
72 #address-cells = <0x2>;
73 #size-cells = <0x2>;
74 device_type = "soc";
75 interrupt-parent = <0x1>;
76 ranges;
77
78 interrupt-controller@1400000 {
79 compatible = "arm,cortex-a15-gic";
80 #interrupt-cells = <0x3>;
81 interrupt-controller;
82 reg = <0x0 0x1401000 0x0 0x1000 0x0 0x1402000 0x0 0x1000 0x0 0x1404000 0x0 0x2000 0x0 0x1406000 0x0 0x2000>;
83 interrupts = <0x1 0x9 0x304>;
84 linux,phandle = <0x1>;
85 phandle = <0x1>;
86 };
87
88 ifc@1530000 {
89 compatible = "fsl,ifc", "simple-bus";
90 reg = <0x0 0x1530000 0x0 0x10000>;
91 interrupts = <0x0 0x4b 0x4>;
92 status = "disabled";
93 };
94
95 dcfg@1ee0000 {
96 compatible = "fsl,ls1021a-dcfg";
97 reg = <0x0 0x1ee0000 0x0 0x10000>;
98 };
99
100 quadspi@1550000 {
101 compatible = "fsl,ls1-qspi";
102 #address-cells = <0x1>;
103 #size-cells = <0x0>;
104 reg = <0x0 0x1550000 0x0 0x10000 0x0 0x40000000 0x0 0x4000000>;
105 reg-names = "QuadSPI", "QuadSPI-memory";
106 interrupts = <0x0 0x83 0x4>;
107 clock-names = "qspi_en", "qspi";
108 clocks = <0x3 0x1 0x3 0x1>;
109 big-endian;
110 amba-base = <0x40000000>;
111 status = "disabled";
112 num-cs = <0x2>;
113 bus-num = <0x0>;
114 fsl,spi-num-chipselects = <0x2>;
115 fsl,spi-flash-chipselects = <0x0>;
116
117 s25fl128s@0 {
118 #address-cells = <0x1>;
119 #size-cells = <0x1>;
120 compatible = "spansion,s25fl129p1";
121 spi-max-frequency = <0x1312d00>;
122 reg = <0x0>;
123
124 partition@0 {
125 label = "s25fl128s-0";
126 reg = <0x0 0x1000000>;
127 };
128 };
129
130 s25fl128s@1 {
131 #address-cells = <0x1>;
132 #size-cells = <0x1>;
133 compatible = "spansion,s25fl129p1";
134 spi-max-frequency = <0x1312d00>;
135 reg = <0x1>;
136
137 partition@0x0 {
138 label = "s25fl128s-1";
139 reg = <0x0 0x1000000>;
140 };
141 };
142 };
143
144 esdhc@1560000 {
145 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
146 reg = <0x0 0x1560000 0x0 0x10000>;
147 interrupts = <0x0 0x5e 0x4>;
148 clock-frequency = <0x0>;
149 voltage-ranges = <0x708 0x708 0xce4 0xce4>;
150 sdhci,auto-cmd12;
151 big-endian;
152 bus-width = <0x4>;
153 sleep = <0x4 0x80 0x0>;
154 status = "disabled";
155 };
156
157 sata@3200000 {
158 compatible = "fsl,ls1021a-ahci";
159 reg = <0x0 0x3200000 0x0 0x10000>;
160 interrupts = <0x0 0x65 0x4>;
161 clocks = <0x3 0x1>;
162 };
163
164 scfg@1570000 {
165 compatible = "fsl,ls1021a-scfg", "syscon";
166 reg = <0x0 0x1570000 0x0 0x10000>;
167 big-endian;
168 linux,phandle = <0xc>;
169 phandle = <0xc>;
170 };
171
172 crypto@1700000 {
173 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
174 fsl,sec-era = <0x4>;
175 #address-cells = <0x1>;
176 #size-cells = <0x1>;
177 reg = <0x0 0x1700000 0x0 0x100000>;
178 ranges = <0x0 0x0 0x1700000 0x100000>;
179 interrupts = <0x0 0x6b 0x4>;
180
181 jr@10000 {
182 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
183 reg = <0x10000 0x10000>;
184 interrupts = <0x0 0x67 0x4>;
185 };
186
187 jr@20000 {
188 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
189 reg = <0x20000 0x10000>;
190 interrupts = <0x0 0x68 0x4>;
191 };
192
193 jr@30000 {
194 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
195 reg = <0x30000 0x10000>;
196 interrupts = <0x0 0x69 0x4>;
197 };
198
199 jr@40000 {
200 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
201 reg = <0x40000 0x10000>;
202 interrupts = <0x0 0x6a 0x4>;
203 };
204 };
205
206 clocking@1ee1000 {
207 compatible = "fsl,ls1021a-clockgen";
208 reg = <0x0 0x1ee1000 0x0 0x10000>;
209 #address-cells = <0x1>;
210 #size-cells = <0x0>;
211
212 sysclk {
213 compatible = "fixed-clock";
214 #clock-cells = <0x0>;
215 clock-frequency = <0x5f5e100>;
216 clock-output-names = "sysclk";
217 linux,phandle = <0x5>;
218 phandle = <0x5>;
219 };
220
221 pll1@800 {
222 compatible = "fsl,core-pll-clock";
223 #clock-cells = <0x1>;
224 reg = <0x800>;
225 clocks = <0x5>;
226 clock-output-names = "cga-pll1", "cga-pll1-div2", "cga-pll1-div4";
227 linux,phandle = <0x6>;
228 phandle = <0x6>;
229 };
230
231 pll@c00 {
232 compatible = "fsl,core-pll-clock";
233 #clock-cells = <0x1>;
234 reg = <0xc00>;
235 clocks = <0x5>;
236 clock-output-names = "platform-clk", "platform-clk-div2";
237 linux,phandle = <0x3>;
238 phandle = <0x3>;
239 };
240
241 clk0c0@0 {
242 compatible = "fsl,core-mux-clock";
243 #clock-cells = <0x0>;
244 reg = <0x0>;
245 clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
246 clocks = <0x6 0x0 0x6 0x1 0x6 0x2>;
247 clock-output-names = "cluster1-clk";
248 linux,phandle = <0x2>;
249 phandle = <0x2>;
250 };
251 };
252
253 rcpm@1ee2000 {
254 compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1";
255 reg = <0x0 0x1ee2000 0x0 0x10000>;
256 linux,phandle = <0x4>;
257 phandle = <0x4>;
258 };
259
260 dspi@2100000 {
261 compatible = "fsl,vf610-dspi";
262 #address-cells = <0x1>;
263 #size-cells = <0x0>;
264 reg = <0x0 0x2100000 0x0 0x10000>;
265 interrupts = <0x0 0x60 0x4>;
266 clock-names = "dspi";
267 clocks = <0x3 0x1>;
268 spi-num-chipselects = <0x5>;
269 big-endian;
270 tcfq-mode;
271 status = "disabled";
272 };
273
274 dspi@2110000 {
275 compatible = "fsl,vf610-dspi";
276 #address-cells = <0x1>;
277 #size-cells = <0x0>;
278 reg = <0x0 0x2110000 0x0 0x10000>;
279 interrupts = <0x0 0x61 0x4>;
280 clock-names = "dspi";
281 clocks = <0x3 0x1>;
282 spi-num-chipselects = <0x5>;
283 big-endian;
284 tcfq-mode;
285 status = "disabled";
286 };
287
288 i2c@2180000 {
289 compatible = "fsl,vf610-i2c";
290 #address-cells = <0x1>;
291 #size-cells = <0x0>;
292 reg = <0x0 0x2180000 0x0 0x10000>;
293 interrupts = <0x0 0x58 0x4>;
294 clock-names = "i2c";
295 clocks = <0x3 0x1>;
296 status = "okay";
297
298 max1239@35 {
299 compatible = "maxim,max1239";
300 reg = <0x35>;
301 #io-channel-cells = <0x1>;
302 };
303
304 sgtl5000@2a {
305 compatible = "fsl,sgtl5000";
306 reg = <0x2a>;
307 VDDA-supply = <0x7>;
308 VDDIO-supply = <0x8>;
309 clocks = <0x9 0x1>;
310 linux,phandle = <0x14>;
311 phandle = <0x14>;
312 };
313
314 pca9555@23 {
315 compatible = "nxp,pca9555";
316 gpio-controller;
317 #gpio-cells = <0x2>;
318 interrupt-controller;
319 #interrupt-cells = <0x2>;
320 reg = <0x23>;
321 };
322
323 ina220@44 {
324 compatible = "ti,ina220";
325 reg = <0x44>;
326 shunt-resistor = <0x3e8>;
327 };
328
329 ina220@45 {
330 compatible = "ti,ina220";
331 reg = <0x45>;
332 shunt-resistor = <0x3e8>;
333 };
334
335 lm75b@48 {
336 compatible = "nxp,lm75a";
337 reg = <0x48>;
338 };
339
340 adt7461a@4c {
341 compatible = "adt7461a";
342 reg = <0x4c>;
343 };
344
345 sii9022a@39 {
346 compatible = "fsl,sii902x";
347 reg = <0x39>;
348 interrupts = <0x0 0xa3 0x1>;
349 };
350 };
351
352 i2c@2190000 {
353 compatible = "fsl,vf610-i2c";
354 #address-cells = <0x1>;
355 #size-cells = <0x0>;
356 reg = <0x0 0x2190000 0x0 0x10000>;
357 interrupts = <0x0 0x59 0x4>;
358 clock-names = "i2c";
359 clocks = <0x3 0x1>;
360 status = "disabled";
361 };
362
363 i2c@21a0000 {
364 compatible = "fsl,vf610-i2c";
365 #address-cells = <0x1>;
366 #size-cells = <0x0>;
367 reg = <0x0 0x21a0000 0x0 0x10000>;
368 interrupts = <0x0 0x5a 0x4>;
369 clock-names = "i2c";
370 clocks = <0x3 0x1>;
371 status = "disabled";
372 };
373
374 serial@21c0500 {
375 compatible = "fsl,16550-FIFO64";
376 reg = <0x0 0x21c0500 0x0 0x100>;
377 interrupts = <0x0 0x56 0x4>;
378 clock-frequency = <0x0>;
379 fifo-size = <0x3f>;
380 status = "okay";
381 };
382
383 serial@21c0600 {
384 compatible = "fsl,16550-FIFO64";
385 reg = <0x0 0x21c0600 0x0 0x100>;
386 interrupts = <0x0 0x56 0x4>;
387 clock-frequency = <0x0>;
388 fifo-size = <0x3f>;
389 status = "disabled";
390 };
391
392 serial@21d0500 {
393 compatible = "fsl,16550-FIFO64";
394 reg = <0x0 0x21d0500 0x0 0x100>;
395 interrupts = <0x0 0x57 0x4>;
396 clock-frequency = <0x0>;
397 fifo-size = <0x3f>;
398 status = "disabled";
399 };
400
401 serial@21d0600 {
402 compatible = "fsl,16550-FIFO64";
403 reg = <0x0 0x21d0600 0x0 0x100>;
404 interrupts = <0x0 0x57 0x4>;
405 clock-frequency = <0x0>;
406 fifo-size = <0x3f>;
407 status = "disabled";
408 };
409
410 uqe@2400000 {
411 #address-cells = <0x1>;
412 #size-cells = <0x1>;
413 device_type = "qe";
414 compatible = "fsl,qe", "simple-bus";
415 ranges = <0x0 0x0 0x2400000 0x40000>;
416 reg = <0x0 0x2400000 0x0 0x480>;
417 brg-frequency = <0x5f5e100>;
418 bus-frequency = <0xbebc200>;
419 fsl,qe-num-riscs = <0x1>;
420 fsl,qe-num-snums = <0x1c>;
421
422 qeic@80 {
423 compatible = "fsl,qe-ic";
424 reg = <0x80 0x80>;
425 #address-cells = <0x0>;
426 interrupt-controller;
427 #interrupt-cells = <0x1>;
428 interrupts = <0x0 0x6d 0x4 0x0 0x6d 0x4>;
429 linux,phandle = <0xa>;
430 phandle = <0xa>;
431 };
432
433 si@700 {
434 #address-cells = <0x1>;
435 #size-cells = <0x0>;
436 compatible = "fsl,qe-si";
437 reg = <0x700 0x80>;
438 };
439
440 siram@1000 {
441 #address-cells = <0x1>;
442 #size-cells = <0x1>;
443 compatible = "fsl,qe-siram";
444 reg = <0x1000 0x800>;
445 };
446
447 ucc@2000 {
448 cell-index = <0x1>;
449 reg = <0x2000 0x200>;
450 interrupts = <0x20>;
451 interrupt-parent = <0xa>;
452 compatible = "fsl,ucc-tdm";
453 rx-clock-name = "brg1";
454 tx-clock-name = "brg1";
455 fsl,rx-sync-clock = "none";
456 fsl,tx-sync-clock = "none";
457 fsl,tx-timeslot = <0xfffffffe>;
458 fsl,rx-timeslot = <0xfffffffe>;
459 fsl,tdm-framer-type = "e1";
460 fsl,tdm-mode = "internel-loopback";
461 fsl,tdm-id = <0x0>;
462 fsl,siram-entry-id = <0x0>;
463 };
464
465 ucc@2200 {
466 cell-index = <0x3>;
467 reg = <0x2200 0x200>;
468 interrupts = <0x22>;
469 interrupt-parent = <0xa>;
470 device_type = "serial";
471 compatible = "ucc_uart";
472 port-number = <0x1>;
473 rx-clock-name = "brg2";
474 tx-clock-name = "brg2";
475 };
476
477 muram@10000 {
478 #address-cells = <0x1>;
479 #size-cells = <0x1>;
480 compatible = "fsl,qe-muram", "fsl,cpm-muram";
481 ranges = <0x0 0x10000 0x6000>;
482
483 data-only@0 {
484 compatible = "fsl,qe-muram-data", "fsl,cpm-muram-data";
485 reg = <0x0 0x6000>;
486 };
487 };
488 };
489
490 serial@2950000 {
491 compatible = "fsl,ls1021a-lpuart";
492 reg = <0x0 0x2950000 0x0 0x1000>;
493 interrupts = <0x0 0x50 0x4>;
494 clocks = <0x5>;
495 clock-names = "ipg";
496 sleep = <0x4 0x0 0x40000000>;
497 status = "okay";
498 };
499
500 serial@2960000 {
501 compatible = "fsl,ls1021a-lpuart";
502 reg = <0x0 0x2960000 0x0 0x1000>;
503 interrupts = <0x0 0x51 0x4>;
504 clocks = <0x3 0x1>;
505 clock-names = "ipg";
506 status = "disabled";
507 };
508
509 serial@2970000 {
510 compatible = "fsl,ls1021a-lpuart";
511 reg = <0x0 0x2970000 0x0 0x1000>;
512 interrupts = <0x0 0x52 0x4>;
513 clocks = <0x3 0x1>;
514 clock-names = "ipg";
515 status = "disabled";
516 };
517
518 serial@2980000 {
519 compatible = "fsl,ls1021a-lpuart";
520 reg = <0x0 0x2980000 0x0 0x1000>;
521 interrupts = <0x0 0x53 0x4>;
522 clocks = <0x3 0x1>;
523 clock-names = "ipg";
524 status = "disabled";
525 };
526
527 serial@2990000 {
528 compatible = "fsl,ls1021a-lpuart";
529 reg = <0x0 0x2990000 0x0 0x1000>;
530 interrupts = <0x0 0x54 0x4>;
531 clocks = <0x3 0x1>;
532 clock-names = "ipg";
533 status = "disabled";
534 };
535
536 serial@29a0000 {
537 compatible = "fsl,ls1021a-lpuart";
538 reg = <0x0 0x29a0000 0x0 0x1000>;
539 interrupts = <0x0 0x55 0x4>;
540 clocks = <0x3 0x1>;
541 clock-names = "ipg";
542 status = "disabled";
543 };
544
545 gpio@2300000 {
546 compatible = "fsl,ls1021a-gpio";
547 reg = <0x0 0x2300000 0x0 0x10000>;
548 interrupts = <0x0 0x62 0x4>;
549 gpio-controller;
550 #gpio-cells = <0x2>;
551 interrupt-controller;
552 #interrupt-cells = <0x2>;
553 sleep = <0x4 0x40 0x0>;
554 };
555
556 gpio@2310000 {
557 compatible = "fsl,ls1021a-gpio";
558 reg = <0x0 0x2310000 0x0 0x10000>;
559 interrupts = <0x0 0x63 0x4>;
560 gpio-controller;
561 #gpio-cells = <0x2>;
562 interrupt-controller;
563 #interrupt-cells = <0x2>;
564 };
565
566 gpio@2320000 {
567 compatible = "fsl,ls1021a-gpio";
568 reg = <0x0 0x2320000 0x0 0x10000>;
569 interrupts = <0x0 0x64 0x4>;
570 gpio-controller;
571 #gpio-cells = <0x2>;
572 interrupt-controller;
573 #interrupt-cells = <0x2>;
574 };
575
576 gpio@2330000 {
577 compatible = "fsl,ls1021a-gpio";
578 reg = <0x0 0x2330000 0x0 0x10000>;
579 interrupts = <0x0 0xa6 0x4>;
580 gpio-controller;
581 #gpio-cells = <0x2>;
582 interrupt-controller;
583 #interrupt-cells = <0x2>;
584 };
585
586 ftm0@29d0000 {
587 compatible = "fsl,ftm-alarm";
588 reg = <0x0 0x29d0000 0x0 0x10000>;
589 interrupts = <0x0 0x76 0x4>;
590 big-endian;
591 sleep = <0x4 0x0 0x20000000>;
592 status = "disabled";
593 };
594
595 ftm@2a00000 {
596 compatible = "fsl,vf610-ftm-pwm";
597 #pwm-cells = <0x3>;
598 reg = <0x0 0x2a00000 0x0 0x10000>;
599 interrupts = <0x0 0x79 0x4>;
600 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
601 clocks = <0x3 0x1 0x3 0x1 0x3 0x1 0x3 0x1>;
602 big-endian;
603 status = "disabled";
604 };
605
606 ftm@2a30000 {
607 compatible = "fsl,vf610-ftm-pwm";
608 #pwm-cells = <0x3>;
609 reg = <0x0 0x2a30000 0x0 0x10000>;
610 interrupts = <0x0 0x7b 0x4>;
611 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
612 clocks = <0x3 0x1 0x3 0x1 0x3 0x1 0x3 0x1>;
613 big-endian;
614 status = "disabled";
615 };
616
617 ftm@2a40000 {
618 compatible = "fsl,vf610-ftm-pwm";
619 #pwm-cells = <0x3>;
620 reg = <0x0 0x2a40000 0x0 0x10000>;
621 interrupts = <0x0 0x7c 0x4>;
622 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
623 clocks = <0x3 0x1 0x3 0x1 0x3 0x1 0x3 0x1>;
624 big-endian;
625 status = "disabled";
626 };
627
628 wdog@2ad0000 {
629 compatible = "fsl,imx21-wdt";
630 reg = <0x0 0x2ad0000 0x0 0x10000>;
631 interrupts = <0x0 0x73 0x4>;
632 clocks = <0x3 0x1>;
633 clock-names = "wdog";
634 big-endian;
635 };
636
637 sai@2b50000 {
638 compatible = "fsl,vf610-sai";
639 reg = <0x0 0x2b50000 0x0 0x10000>;
640 interrupts = <0x0 0x84 0x4>;
641 clocks = <0x3 0x1>;
642 clock-names = "sai";
643 dma-names = "tx", "rx";
644 dmas = <0xb 0x1 0x2f 0xb 0x1 0x2e>;
645 status = "disabled";
646 };
647
648 sai@2b60000 {
649 compatible = "fsl,vf610-sai";
650 reg = <0x0 0x2b60000 0x0 0x10000>;
651 interrupts = <0x0 0x85 0x4>;
652 clocks = <0x3 0x1>;
653 clock-names = "sai";
654 dma-names = "tx", "rx";
655 dmas = <0xb 0x1 0x2d 0xb 0x1 0x2c>;
656 status = "okay";
657 linux,phandle = <0x13>;
658 phandle = <0x13>;
659 };
660
661 edma@2c00000 {
662 #dma-cells = <0x2>;
663 compatible = "fsl,vf610-edma";
664 reg = <0x0 0x2c00000 0x0 0x10000 0x0 0x2c10000 0x0 0x10000 0x0 0x2c20000 0x0 0x10000>;
665 interrupts = <0x0 0x87 0x4 0x0 0x87 0x4>;
666 interrupt-names = "edma-tx", "edma-err";
667 dma-channels = <0x20>;
668 big-endian;
669 clock-names = "dmamux0", "dmamux1";
670 clocks = <0x3 0x1 0x3 0x1>;
671 linux,phandle = <0xb>;
672 phandle = <0xb>;
673 };
674
675 dcu@2ce0000 {
676 compatible = "fsl,ls1021a-dcu";
677 reg = <0x0 0x2ce0000 0x0 0x10000>;
678 interrupts = <0x0 0xac 0x4>;
679 clocks = <0x3 0x0>;
680 clock-names = "dcu";
681 scfg-controller = <0xc>;
682 big-endian;
683 status = "okay";
684 display = <0xd>;
685
686 display@0 {
687 bits-per-pixel = <0x18>;
688 linux,phandle = <0xd>;
689 phandle = <0xd>;
690
691 display-timings {
692 native-mode = <0xe>;
693
694 mode0 {
695 clock-frequency = <0x17d7840>;
696 hactive = <0x280>;
697 vactive = <0x1e0>;
698 hback-porch = <0x50>;
699 hfront-porch = <0x50>;
700 vback-porch = <0x10>;
701 vfront-porch = <0x10>;
702 hsync-len = <0xc>;
703 vsync-len = <0x2>;
704 hsync-active = <0x1>;
705 vsync-active = <0x1>;
706 linux,phandle = <0xe>;
707 phandle = <0xe>;
708 };
709 };
710 };
711 };
712
713 mdio@2d24000 {
714 compatible = "gianfar";
715 device_type = "mdio";
716 #address-cells = <0x1>;
717 #size-cells = <0x0>;
718 reg = <0x0 0x2d24000 0x0 0x4000>;
719
720 ethernet-phy@0 {
721 reg = <0x0>;
722 };
723
724 ethernet-phy@1 {
725 reg = <0x1>;
726 interrupts = <0x0 0xa5 0x8>;
727 linux,phandle = <0x10>;
728 phandle = <0x10>;
729 };
730
731 ethernet-phy@2 {
732 reg = <0x2>;
733 linux,phandle = <0x12>;
734 phandle = <0x12>;
735 };
736
737 ethernet-phy@3 {
738 reg = <0x3>;
739 interrupts = <0x0 0xa5 0x8>;
740 linux,phandle = <0x11>;
741 phandle = <0x11>;
742 };
743
744 tbi-phy@1f {
745 reg = <0x1f>;
746 device_type = "tbi-phy";
747 linux,phandle = <0xf>;
748 phandle = <0xf>;
749 };
750 };
751
752 ethernet@2d10000 {
753 compatible = "fsl,etsec2";
754 device_type = "network";
755 #address-cells = <0x2>;
756 #size-cells = <0x2>;
757 interrupt-parent = <0x1>;
758 model = "eTSEC";
759 fsl,dma-endian-le;
760 fsl,magic-packet;
761 fsl,wake-on-filer;
762 sleep = <0x4 0x80000000 0x0>;
763 fsl,num_rx_queues = <0x8>;
764 fsl,num_tx_queues = <0x8>;
765 local-mac-address = [00 00 00 00 00 00];
766 ranges;
767 tbi-handle = <0xf>;
768 phy-handle = <0x10>;
769 phy-connection-type = "sgmii";
770 status = "ok";
771
772 queue-group@2d10000 {
773 #address-cells = <0x2>;
774 #size-cells = <0x2>;
775 reg = <0x0 0x2d10000 0x0 0x1000>;
776 interrupts = <0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
777 };
778
779 queue-group@2d14000 {
780 #address-cells = <0x2>;
781 #size-cells = <0x2>;
782 reg = <0x0 0x2d14000 0x0 0x1000>;
783 interrupts = <0x0 0x93 0x4 0x0 0x94 0x4 0x0 0x95 0x4>;
784 };
785 };
786
787 ethernet@2d50000 {
788 compatible = "fsl,etsec2";
789 device_type = "network";
790 #address-cells = <0x2>;
791 #size-cells = <0x2>;
792 interrupt-parent = <0x1>;
793 model = "eTSEC";
794 fsl,dma-endian-le;
795 fsl,num_rx_queues = <0x8>;
796 fsl,num_tx_queues = <0x8>;
797 local-mac-address = [00 00 00 00 00 00];
798 ranges;
799 tbi-handle = <0xf>;
800 phy-handle = <0x11>;
801 phy-connection-type = "sgmii";
802 status = "ok";
803
804 queue-group@2d50000 {
805 #address-cells = <0x2>;
806 #size-cells = <0x2>;
807 reg = <0x0 0x2d50000 0x0 0x1000>;
808 interrupts = <0x0 0x96 0x4 0x0 0x98 0x4 0x0 0x99 0x4>;
809 };
810
811 queue-group@2d54000 {
812 #address-cells = <0x2>;
813 #size-cells = <0x2>;
814 reg = <0x0 0x2d54000 0x0 0x1000>;
815 interrupts = <0x0 0x9a 0x4 0x0 0x9b 0x4 0x0 0x9c 0x4>;
816 };
817 };
818
819 ethernet@2d90000 {
820 compatible = "fsl,etsec2";
821 device_type = "network";
822 #address-cells = <0x2>;
823 #size-cells = <0x2>;
824 interrupt-parent = <0x1>;
825 model = "eTSEC";
826 fsl,dma-endian-le;
827 fsl,num_rx_queues = <0x8>;
828 fsl,num_tx_queues = <0x8>;
829 local-mac-address = [00 00 00 00 00 00];
830 ranges;
831 tbi-handle = <0xf>;
832 phy-handle = <0x12>;
833 phy-connection-type = "rgmii";
834 status = "ok";
835
836 queue-group@2d90000 {
837 #address-cells = <0x2>;
838 #size-cells = <0x2>;
839 reg = <0x0 0x2d90000 0x0 0x1000>;
840 interrupts = <0x0 0x9d 0x4 0x0 0x9e 0x4 0x0 0x9f 0x4>;
841 };
842
843 queue-group@2d94000 {
844 #address-cells = <0x2>;
845 #size-cells = <0x2>;
846 reg = <0x0 0x2d94000 0x0 0x1000>;
847 interrupts = <0x0 0xa0 0x4 0x0 0xa1 0x4 0x0 0xa2 0x4>;
848 };
849 };
850
851 can@2a70000 {
852 compatible = "fsl,ls1021ar2-flexcan";
853 reg = <0x0 0x2a70000 0x0 0x1000>;
854 interrupts = <0x0 0x7e 0x4>;
855 clocks = <0x3 0x1 0x3 0x1>;
856 clock-names = "ipg", "per";
857 little-endian;
858 };
859
860 can@2a80000 {
861 compatible = "fsl,ls1021ar2-flexcan";
862 reg = <0x0 0x2a80000 0x0 0x1000>;
863 interrupts = <0x0 0x7f 0x4>;
864 clocks = <0x3 0x1 0x3 0x1>;
865 clock-names = "ipg", "per";
866 little-endian;
867 };
868
869 can@2a90000 {
870 compatible = "fsl,ls1021ar2-flexcan";
871 reg = <0x0 0x2a90000 0x0 0x1000>;
872 interrupts = <0x0 0x80 0x4>;
873 clocks = <0x3 0x1 0x3 0x1>;
874 clock-names = "ipg", "per";
875 little-endian;
876 status = "okay";
877 };
878
879 can@2aa0000 {
880 compatible = "fsl,ls1021ar2-flexcan";
881 reg = <0x0 0x2aa0000 0x0 0x1000>;
882 interrupts = <0x0 0x81 0x4>;
883 clocks = <0x3 0x1 0x3 0x1>;
884 clock-names = "ipg", "per";
885 little-endian;
886 status = "okay";
887 };
888
889 usb@8600000 {
890 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
891 reg = <0x0 0x8600000 0x0 0x1000>;
892 interrupts = <0x0 0xab 0x4>;
893 dr_mode = "host";
894 phy_type = "ulpi";
895 };
896
897 usb3@3100000 {
898 compatible = "snps,dwc3";
899 reg = <0x0 0x3100000 0x0 0x10000>;
900 interrupts = <0x0 0x5d 0x4>;
901 dr_mode = "host";
902 configure-gfladj;
903 };
904
905 pcie@3400000 {
906 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
907 reg = <0x0 0x3400000 0x0 0x10000 0x40 0x0 0x0 0x2000>;
908 reg-names = "regs", "config";
909 interrupts = <0x0 0xb1 0x4 0x0 0xb3 0x4 0x0 0xb5 0x4>;
910 interrupt-names = "intr", "msi", "pme";
911 fsl,pcie-scfg = <0xc 0x0>;
912 num-atus = <0x6>;
913 #address-cells = <0x3>;
914 #size-cells = <0x2>;
915 device_type = "pci";
916 num-lanes = <0x4>;
917 bus-range = <0x0 0xff>;
918 ranges = <0x81000000 0x0 0x0 0x40 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>;
919 #interrupt-cells = <0x1>;
920 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
921 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5b 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbc 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbe 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc0 0x4>;
922 };
923
924 pcie@3500000 {
925 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
926 reg = <0x0 0x3500000 0x0 0x10000 0x48 0x0 0x0 0x2000>;
927 reg-names = "regs", "config";
928 interrupts = <0x0 0xb2 0x4 0x0 0xb4 0x4 0x0 0xb6 0x4>;
929 interrupt-names = "intr", "msi", "pme";
930 fsl,pcie-scfg = <0xc 0x1>;
931 num-atus = <0x6>;
932 #address-cells = <0x3>;
933 #size-cells = <0x2>;
934 device_type = "pci";
935 num-lanes = <0x2>;
936 bus-range = <0x0 0xff>;
937 ranges = <0x81000000 0x0 0x0 0x48 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>;
938 #interrupt-cells = <0x1>;
939 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
940 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5c 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbd 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbf 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc1 0x4>;
941 };
942 };
943
944 dcsr {
945 #address-cells = <0x1>;
946 #size-cells = <0x1>;
947 compatible = "fsl,dcsr", "simple-bus";
948 ranges = <0x0 0x0 0x20000000 0x1000000>;
949
950 dcsr-epu@0 {
951 compatible = "fsl,ls1021a-dcsr-epu";
952 reg = <0x0 0x10000>;
953 };
954
955 dcsr-gdi@100000 {
956 compatible = "fsl,ls1021a-dcsr-gdi";
957 reg = <0x100000 0x10000>;
958 };
959
960 dcsr-dddi@120000 {
961 compatible = "fsl,ls1021a-dcsr-dddi";
962 reg = <0x120000 0x10000>;
963 };
964
965 dcsr-dcfg@220000 {
966 compatible = "fsl,ls1021a-dcsr-dcfg";
967 reg = <0x220000 0x1000>;
968 };
969
970 dcsr-clock@221000 {
971 compatible = "fsl,ls1021a-dcsr-clock";
972 reg = <0x221000 0x1000>;
973 };
974
975 dcsr-rcpm@222000 {
976 compatible = "fsl,ls1021a-dcsr-rcpm";
977 reg = <0x222000 0x1000 0x223000 0x1000>;
978 };
979
980 dcsr-ccp@225000 {
981 compatible = "fsl,ls1021a-dcsr-ccp";
982 reg = <0x225000 0x1000>;
983 };
984
985 dcsr-fusectrl@226000 {
986 compatible = "fsl,ls1021a-dcsr-fusectrl";
987 reg = <0x226000 0x1000>;
988 };
989
990 dcsr-dap@300000 {
991 compatible = "fsl,ls1021a-dcsr-dap";
992 reg = <0x300000 0x10000>;
993 };
994
995 dcsr-cstf@350000 {
996 compatible = "fsl,ls1021a-dcsr-cstf";
997 reg = <0x350000 0x1000 0x3a7000 0x1000>;
998 };
999
1000 dcsr-a7rom@360000 {
1001 compatible = "fsl,ls1021a-dcsr-a7rom";
1002 reg = <0x360000 0x10000>;
1003 };
1004
1005 dcsr-a7cpu@370000 {
1006 compatible = "fsl,ls1021a-dcsr-a7cpu";
1007 reg = <0x370000 0x8000>;
1008 };
1009
1010 dcsr-a7cti@378000 {
1011 compatible = "fsl,ls1021a-dcsr-a7cti";
1012 reg = <0x378000 0x4000>;
1013 };
1014
1015 dcsr-etm@37c000 {
1016 compatible = "fsl,ls1021a-dcsr-etm";
1017 reg = <0x37c000 0x1000 0x37d000 0x3000>;
1018 };
1019
1020 dcsr-hugorom@3a0000 {
1021 compatible = "fsl,ls1021a-dcsr-hugorom";
1022 reg = <0x3a0000 0x1000>;
1023 };
1024
1025 dcsr-etf@3a1000 {
1026 compatible = "fsl,ls1021a-dcsr-etf";
1027 reg = <0x3a1000 0x1000 0x3a2000 0x1000>;
1028 };
1029
1030 dcsr-etr@3a3000 {
1031 compatible = "fsl,ls1021a-dcsr-etr";
1032 reg = <0x3a3000 0x1000>;
1033 };
1034
1035 dcsr-cti@3a4000 {
1036 compatible = "fsl,ls1021a-dcsr-cti";
1037 reg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>;
1038 };
1039
1040 dcsr-atbrepl@3a8000 {
1041 compatible = "fsl,ls1021a-dcsr-atbrepl";
1042 reg = <0x3a8000 0x1000>;
1043 };
1044
1045 dcsr-tsgen-ctrl@3a9000 {
1046 compatible = "fsl,ls1021a-dcsr-tsgen-ctrl";
1047 reg = <0x3a9000 0x1000>;
1048 };
1049
1050 dcsr-tsgen-read@3aa000 {
1051 compatible = "fsl,ls1021a-dcsr-tsgen-read";
1052 reg = <0x3aa000 0x1000>;
1053 };
1054 };
1055
1056 clocks {
1057
1058 clock {
1059 compatible = "fixed-clock";
1060 #clock-cells = <0x0>;
1061 clock-frequency = <0x1770000>;
1062 linux,phandle = <0x9>;
1063 phandle = <0x9>;
1064 };
1065 };
1066
1067 regulators {
1068 compatible = "simple-bus";
1069 #address-cells = <0x1>;
1070 #size-cells = <0x0>;
1071
1072 regulator@0 {
1073 compatible = "regulator-fixed";
1074 reg = <0x0>;
1075 regulator-name = "3P3V";
1076 regulator-min-microvolt = <0x325aa0>;
1077 regulator-max-microvolt = <0x325aa0>;
1078 regulator-always-on;
1079 linux,phandle = <0x7>;
1080 phandle = <0x7>;
1081 };
1082
1083 regulator@1 {
1084 compatible = "regulator-fixed";
1085 reg = <0x1>;
1086 regulator-name = "2P5V";
1087 regulator-min-microvolt = <0x2625a0>;
1088 regulator-max-microvolt = <0x2625a0>;
1089 regulator-always-on;
1090 linux,phandle = <0x8>;
1091 phandle = <0x8>;
1092 };
1093 };
1094
1095 sound {
1096 compatible = "fsl,vf610-sgtl5000";
1097 simple-audio-card,name = "FSL-VF610-TWR-BOARD";
1098 simple-audio-card,routing = "MIC_IN", "Microphone Jack", "Microphone Jack", "Mic Bias", "LINE_IN", "Line In Jack", "Headphone Jack", "HP_OUT", "Speaker Ext", "LINE_OUT";
1099 simple-audio-card,cpu = <0x13>;
1100 simple-audio-card,codec = <0x14>;
1101 };
1102};
diff --git a/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts b/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts
deleted file mode 100644
index 8c085c8..0000000
--- a/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts
+++ /dev/null
@@ -1,892 +0,0 @@
1/dts-v1/;
2
3/ {
4 #address-cells = <0x00000002>;
5 #size-cells = <0x00000002>;
6 compatible = "fsl,ls1021a";
7 interrupt-parent = <0x00000001>;
8 model = "LS1021A TWR Board";
9 chosen {
10 };
11 aliases {
12 serial0 = "/soc/serial@2950000";
13 serial1 = "/soc/serial@2960000";
14 serial2 = "/soc/serial@2970000";
15 serial3 = "/soc/serial@2980000";
16 serial4 = "/soc/serial@2990000";
17 serial5 = "/soc/serial@29a0000";
18 gpio0 = "/soc/gpio@2300000";
19 gpio1 = "/soc/gpio@2310000";
20 gpio2 = "/soc/gpio@2320000";
21 gpio3 = "/soc/gpio@2330000";
22 ethernet0 = "/soc/ethernet@2d10000";
23 ethernet1 = "/soc/ethernet@2d50000";
24 ethernet2 = "/soc/ethernet@2d90000";
25 };
26 memory {
27 device_type = "memory";
28 reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
29 };
30 cpus {
31 #address-cells = <0x00000001>;
32 #size-cells = <0x00000000>;
33 cpu@0 {
34 compatible = "arm,cortex-a7";
35 device_type = "cpu";
36 reg = <0x00000f00>;
37 };
38 cpu@1 {
39 compatible = "arm,cortex-a7";
40 device_type = "cpu";
41 reg = <0x00000f01>;
42 };
43 };
44 timer {
45 compatible = "arm,armv7-timer";
46 interrupts = <0x00000001 0x0000000d 0x00000308 0x00000001 0x0000000e 0x00000308 0x00000001 0x0000000b 0x00000308 0x00000001 0x0000000a 0x00000308>;
47 };
48 pmu {
49 compatible = "arm,cortex-a7-pmu";
50 interrupts = <0x00000000 0x0000008a 0x00000004 0x00000000 0x0000008b 0x00000004>;
51 };
52 soc {
53 #address-cells = <0x00000002>;
54 #size-cells = <0x00000002>;
55 compatible = "simple-bus";
56 interrupt-parent = <0x00000001>;
57 ranges;
58 interrupt-controller@1400000 {
59 compatible = "arm,cortex-a15-gic";
60 #interrupt-cells = <0x00000003>;
61 interrupt-controller;
62 reg = <0x00000000 0x01401000 0x00000000 0x00001000 0x00000000 0x01402000 0x00000000 0x00001000 0x00000000 0x01404000 0x00000000 0x00002000 0x00000000 0x01406000 0x00000000 0x00002000>;
63 interrupts = <0x00000001 0x00000009 0x00000304>;
64 linux,phandle = <0x00000001>;
65 phandle = <0x00000001>;
66 };
67 tzasc@1500000 {
68 reg = <0x00000000 0x01500000 0x00000000 0x00010000>;
69 interrupts = <0x00000000 0x0000007d 0x00000004>;
70 status = "disabled";
71 };
72 ifc@1530000 {
73 compatible = "fsl,ls1021a-ifc", "fsl,ifc", "simple-bus";
74 reg = <0x00000000 0x01530000 0x00000000 0x00010000>;
75 interrupts = <0x00000000 0x0000004b 0x00000004>;
76 status = "okay";
77 #address-cells = <0x00000002>;
78 #size-cells = <0x00000001>;
79 ranges = <0x00000000 0x00000000 0x00000000 0x60000000 0x08000000 0x00000002 0x00000000 0x00000000 0x7fb00000 0x00000100>;
80 nor@0,0 {
81 #address-cells = <0x00000001>;
82 #size-cells = <0x00000001>;
83 compatible = "cfi-flash";
84 reg = <0x00000000 0x00000000 0x08000000>;
85 bank-width = <0x00000002>;
86 device-width = <0x00000001>;
87 };
88 board-control@2,0 {
89 #address-cells = <0x00000001>;
90 #size-cells = <0x00000001>;
91 compatible = "fsl,ls1021aqds-fpga", "fsl,fpga-qixis";
92 reg = <0x00000002 0x00000000 0x00000100>;
93 bank-width = <0x00000001>;
94 device-width = <0x00000001>;
95 ranges = <0x00000000 0x00000002 0x00000000 0x00000100>;
96 };
97 };
98 dcfg@1ee0000 {
99 compatible = "fsl,ls1021a-dcfg";
100 reg = <0x00000000 0x01ee0000 0x00000000 0x00010000>;
101 };
102 quadspi@1550000 {
103 #address-cells = <0x00000001>;
104 #size-cells = <0x00000000>;
105 compatible = "fsl,vf610-qspi";
106 reg = <0x00000000 0x01550000 0x00000000 0x00010000>;
107 interrupts = <0x00000000 0x00000083 0x00000004>;
108 clock-names = "qspi_en", "qspi";
109 clocks = <0x00000002 0x00000001 0x00000002 0x00000001>;
110 big-endian;
111 amba-base = <0x40000000>;
112 status = "okay";
113 num-cs = <0x00000002>;
114 s25fl128s@0 {
115 #address-cells = <0x00000001>;
116 #size-cells = <0x00000001>;
117 compatible = "spansion,s25fl128s";
118 spi-max-frequency = <0x01312d00>;
119 reg = <0x00000000>;
120 partition@0 {
121 label = "s25fl128s-0";
122 reg = <0x00000000 0x01000000>;
123 };
124 };
125 };
126 esdhc@1560000 {
127 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
128 reg = <0x00000000 0x01560000 0x00000000 0x00010000>;
129 interrupts = <0x00000000 0x0000005e 0x00000004>;
130 clock-frequency = <0x00000000>;
131 voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
132 sdhci,auto-cmd12;
133 big-endian;
134 bus-width = <0x00000004>;
135 status = "disabled";
136 };
137 scfg@1570000 {
138 compatible = "fsl,ls1021a-scfg";
139 reg = <0x00000000 0x01570000 0x00000000 0x00010000>;
140 };
141 crypto@1700000 {
142 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
143 fsl,sec-era = <0x00000004>;
144 #address-cells = <0x00000001>;
145 #size-cells = <0x00000001>;
146 reg = <0x00000000 0x01700000 0x00000000 0x00100000>;
147 ranges = <0x00000000 0x00000000 0x01700000 0x00100000>;
148 interrupts = <0x00000000 0x0000006b 0x00000004>;
149 jr@10000 {
150 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
151 reg = <0x00010000 0x00010000>;
152 interrupts = <0x00000000 0x00000067 0x00000004>;
153 };
154 jr@20000 {
155 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
156 reg = <0x00020000 0x00010000>;
157 interrupts = <0x00000000 0x00000068 0x00000004>;
158 };
159 jr@30000 {
160 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
161 reg = <0x00030000 0x00010000>;
162 interrupts = <0x00000000 0x00000069 0x00000004>;
163 };
164 jr@40000 {
165 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
166 reg = <0x00040000 0x00010000>;
167 interrupts = <0x00000000 0x0000006a 0x00000004>;
168 };
169 };
170 sfp@1e80000 {
171 reg = <0x00000000 0x01e80000 0x00000000 0x00010000>;
172 status = "disabled";
173 };
174 snvs@1e90000 {
175 reg = <0x00000000 0x01e90000 0x00000000 0x00010000>;
176 status = "disabled";
177 };
178 serdes1@1ea0000 {
179 reg = <0x00000000 0x01ea0000 0x00000000 0x00010000>;
180 status = "disabled";
181 };
182 clocking@1ee1000 {
183 compatible = "fsl,ls1021a-clockgen";
184 reg = <0x00000000 0x01ee1000 0x00000000 0x00010000>;
185 #address-cells = <0x00000001>;
186 #size-cells = <0x00000000>;
187 sysclk {
188 compatible = "fsl,sys-clock";
189 #clock-cells = <0x00000000>;
190 clock-frequency = <0x05f5e100>;
191 clock-output-names = "sysclk";
192 linux,phandle = <0x00000003>;
193 phandle = <0x00000003>;
194 };
195 pll1@800 {
196 compatible = "fsl,core-pll-clock";
197 #clock-cells = <0x00000001>;
198 reg = <0x00000800>;
199 clocks = <0x00000003>;
200 clock-output-names = "cga-pll1", "cga-pll1-div2", "cga-pll1-div3", "cga-pll1-div4";
201 linux,phandle = <0x00000004>;
202 phandle = <0x00000004>;
203 };
204 pll2@820 {
205 compatible = "fsl,core-pll-clock";
206 #clock-cells = <0x00000001>;
207 reg = <0x00000820>;
208 clocks = <0x00000003>;
209 clock-output-names = "cga-pll2", "cga-pll2-div2", "cga-pll2-div3", "cga-pll2-div4";
210 };
211 pll@c00 {
212 compatible = "fsl,core-pll-clock";
213 #clock-cells = <0x00000001>;
214 reg = <0x00000c00>;
215 clocks = <0x00000003>;
216 clock-output-names = "platform-clk", "platform-clk-div2";
217 linux,phandle = <0x00000002>;
218 phandle = <0x00000002>;
219 };
220 clk0c0@0 {
221 compatible = "fsl,core-mux-clock";
222 #clock-cells = <0x00000001>;
223 reg = <0x00000000>;
224 clock-names = "pll1cga", "pll1cga-div2";
225 clocks = <0x00000004 0x00000000 0x00000004 0x00000002>;
226 clock-output-names = "cluster1-clk";
227 };
228 };
229 rcpm@1ee2000 {
230 compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1";
231 reg = <0x00000000 0x01ee2000 0x00000000 0x00010000>;
232 };
233 dspi@2100000 {
234 #address-cells = <0x00000001>;
235 #size-cells = <0x00000000>;
236 compatible = "fsl,vf610-dspi";
237 reg = <0x00000000 0x02100000 0x00000000 0x00010000>;
238 interrupts = <0x00000000 0x00000060 0x00000004>;
239 clock-names = "dspi";
240 clocks = <0x00000002 0x00000001>;
241 spi-num-chipselects = <0x00000005>;
242 big-endian;
243 status = "disabled";
244 };
245 dspi@2110000 {
246 #address-cells = <0x00000001>;
247 #size-cells = <0x00000000>;
248 compatible = "fsl,vf610-dspi";
249 reg = <0x00000000 0x02110000 0x00000000 0x00010000>;
250 interrupts = <0x00000000 0x00000061 0x00000004>;
251 clock-names = "dspi";
252 clocks = <0x00000002 0x00000001>;
253 spi-num-chipselects = <0x00000005>;
254 big-endian;
255 status = "okay";
256 bus-num = <0x00000000>;
257 s25fl064k@0 {
258 #address-cells = <0x00000001>;
259 #size-cells = <0x00000001>;
260 compatible = "spansion,s25fl064k";
261 spi-max-frequency = "", "�$";
262 spi-cpol;
263 spi-cpha;
264 reg = <0x00000000>;
265 };
266 };
267 i2c@2180000 {
268 #address-cells = <0x00000001>;
269 #size-cells = <0x00000000>;
270 compatible = "fsl,vf610-i2c";
271 reg = <0x00000000 0x02180000 0x00000000 0x00010000>;
272 interrupts = <0x00000000 0x00000058 0x00000004>;
273 clock-names = "i2c";
274 clocks = <0x00000002 0x00000001>;
275 dmas = <0x00000005 0x00000001 0x00000027 0x00000005 0x00000001 0x00000026>;
276 dma-names = "tx", "rx";
277 status = "okay";
278 };
279 i2c@2190000 {
280 #address-cells = <0x00000001>;
281 #size-cells = <0x00000000>;
282 compatible = "fsl,vf610-i2c";
283 reg = <0x00000000 0x02190000 0x00000000 0x00010000>;
284 interrupts = <0x00000000 0x00000059 0x00000004>;
285 clock-names = "i2c";
286 clocks = <0x00000002 0x00000001>;
287 status = "okay";
288 sgtl5000@14 {
289 compatible = "fsl,sgtl5000";
290 reg = <0x00000014>;
291 VDDA-supply = <0x00000006>;
292 VDDIO-supply = <0x00000006>;
293 clocks = <0x00000002 0x00000001>;
294 linux,phandle = <0x0000000f>;
295 phandle = <0x0000000f>;
296 };
297 };
298 i2c@21a0000 {
299 #address-cells = <0x00000001>;
300 #size-cells = <0x00000000>;
301 compatible = "fsl,vf610-i2c";
302 reg = <0x00000000 0x021a0000 0x00000000 0x00010000>;
303 interrupts = <0x00000000 0x0000005a 0x00000004>;
304 clock-names = "i2c";
305 clocks = <0x00000002 0x00000001>;
306 status = "disabled";
307 };
308 serial@21c0500 {
309 compatible = "ns16550";
310 reg = <0x00000000 0x021c0500 0x00000000 0x00000100>;
311 interrupts = <0x00000000 0x00000056 0x00000004>;
312 clock-frequency = <0x00000000>;
313 status = "okay";
314 };
315 serial@21c0600 {
316 compatible = "ns16550";
317 reg = <0x00000000 0x021c0600 0x00000000 0x00000100>;
318 interrupts = <0x00000000 0x00000056 0x00000004>;
319 clock-frequency = <0x00000000>;
320 status = "okay";
321 };
322 serial@21d0500 {
323 compatible = "ns16550";
324 reg = <0x00000000 0x021d0500 0x00000000 0x00000100>;
325 interrupts = <0x00000000 0x00000057 0x00000004>;
326 clock-frequency = <0x00000000>;
327 status = "disabled";
328 };
329 serial@21d0600 {
330 compatible = "ns16550";
331 reg = <0x00000000 0x021d0600 0x00000000 0x00000100>;
332 interrupts = <0x00000000 0x00000057 0x00000004>;
333 clock-frequency = <0x00000000>;
334 status = "disabled";
335 };
336 pio@2300000 {
337 compatible = "fsl,ls1021a-gpio";
338 reg = <0x00000000 0x02300000 0x00000000 0x00010000>;
339 interrupts = <0x00000000 0x00000062 0x00000004>;
340 gpio-controller;
341 #gpio-cells = <0x00000002>;
342 interrupt-controller;
343 #interrupt-cells = <0x00000002>;
344 };
345 pio@2310000 {
346 compatible = "fsl,ls1021a-gpio";
347 reg = <0x00000000 0x02310000 0x00000000 0x00010000>;
348 interrupts = <0x00000000 0x00000063 0x00000004>;
349 gpio-controller;
350 #gpio-cells = <0x00000002>;
351 interrupt-controller;
352 #interrupt-cells = <0x00000002>;
353 };
354 gpio@2320000 {
355 compatible = "fsl,ls1021a-gpio";
356 reg = <0x00000000 0x02320000 0x00000000 0x00010000>;
357 interrupts = <0x00000000 0x00000064 0x00000004>;
358 gpio-controller;
359 #gpio-cells = <0x00000002>;
360 interrupt-controller; #interrupt-cells = <0x00000002>;
361 };
362 gpio@2330000 {
363 compatible = "fsl,ls1021a-gpio";
364 reg = <0x00000000 0x02330000 0x00000000 0x00010000>;
365 interrupts = <0x00000000 0x000000a6 0x00000004>;
366 gpio-controller;
367 #gpio-cells = <0x00000002>;
368 interrupt-controller;
369 #interrupt-cells = <0x00000002>;
370 };
371 uqe@2400000 {
372 #address-cells = <0x00000001>;
373 #size-cells = <0x00000001>;
374 device_type = "qe";
375 compatible = "fsl,qe";
376 sl,qe-num-riscs = <0x00000001>;
377 sl,qe-num-snums = <0x0000001c>;
378 qeic@80 {
379 compatible = "fsl,qe-ic";
380 reg = <0x00000080 0x00000080>;
381 #address-cells = <0x00000000>;
382 interrupt-controller; #interrupt-cells = <0x00000001>;
383 interrupts = <0x00000000 0x0000006d 0x00000004 0x00000000 0x0000006d 0x00000004>;
384 linux,phandle = <0x00000007>;
385 phandle = <0x00000007>;
386 };
387 cc@2000 {
388 cell-index = <0x00000001>;
389 reg = <0x00002000 0x00000200>;
390 interrupts = <0x00000020>;
391 interrupt-parent = <0x00000007>;
392 };
393 cc@2200 {
394 cell-index = <0x00000003>;
395 reg = <0x00002200 0x00000200>;
396 interrupts = <0x00000022>;
397 interrupt-parent = <0x00000007>;
398 };
399 muram@10000 {
400 #address-cells = <0x00000001>;
401 #size-cells = <0x00000001>;
402 compatible = "fsl,qe-muram", "fsl,cpm-muram";
403 ranges = <0x00000000 0x00010000 0x00006000>;
404 data-only@0 {
405 compatible = "fsl,qe-muram-data", "fsl,cpm-muram-data";
406 reg = <0x00000000 0x00006000>;
407 };
408 };
409 };
410 serial@2950000 {
411 compatible = "fsl,vf610-lpuart";
412 reg = <0x00000000 0x02950000 0x00000000 0x00001000>;
413 interrupts = <0x00000000 0x00000050 0x00000004>;
414 clocks = <0x00000003>;
415 clock-names = "ipg";
416 fsl,lpuart32;
417 status = "okay";
418 };
419 serial@2960000 {
420 compatible = "fsl,vf610-lpuart";
421 reg = <0x00000000 0x02960000 0x00000000 0x00001000>;
422 interrupts = <0x00000000 0x00000051 0x00000004>;
423 clocks = <0x00000002 0x00000001>;
424 clock-names = "ipg";
425 fsl,lpuart32;
426 status = "disabled";
427 };
428 serial@2970000 {
429 compatible = "fsl,vf610-lpuart";
430 reg = <0x00000000 0x02970000 0x00000000 0x00001000>;
431 interrupts = <0x00000000 0x00000052 0x00000004>;
432 clocks = <0x00000002 0x00000001>;
433 clock-names = "ipg";
434 sl,lpuart32;
435 status = "disabled";
436 };
437 serial@2980000 {
438 compatible = "fsl,vf610-lpuart";
439 reg = <0x00000000 0x02980000 0x00000000 0x00001000>;
440 interrupts = <0x00000000 0x00000053 0x00000004>;
441 clocks = <0x00000002 0x00000001>;
442 clock-names= "ipg";
443 fsl,lpuart32;
444 status = "disabled";
445 };
446 serial@2990000 {
447 compatible = "sl,vf610-lpuart";
448 reg = <0x00000000 0x02990000 0x00000000 0x00001000>;
449 interrupts = <0x00000000 0x00000054 0x00000004>;
450 clocks = <0x00000002 0x00000001>;
451 clock-names = "ipg";
452 fsl,lpuart32;
453 status = "disabled";
454 };
455 serial@29a0000 {
456 compatible = "fsl,vf610-lpuart";
457 reg = <0x00000000 0x029a0000 0x00000000 0x00001000>;
458 interrupts = <0x00000000 0x00000055 0x00000004>;
459 clocks = <0x00000002 0x00000001>;
460 clock-names = "ipg";
461 fsl,lpuart32;
462 status = "disabled";
463 };
464 ftm0_1@29d0000 {
465 compatible = "fsl,ftm-timer";
466 reg = <0x00000000 0x029d0000 0x00000000 0x00010000 0x00000000 0x029e0000 0x00000000 0x00010000>;
467 interrupts = <0x00000000 0x00000076 0x00000004>;
468 clock-names = "ftm-evt", "ftm-src", "ftm-evt-counter-en", "ftm-src-counter-en";
469 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
470 big-endian;
471 status = "okay";
472 };
473 ftm@29f0000 {
474 reg = <0x00000000 0x029f0000 0x00000000 0x00010000>;
475 interrupts = <0x00000000 0x00000078 0x00000004>;
476 status = "disabled";
477 };
478 tm@2a00000 {
479 compatible = "fsl,vf610-ftm-pwm";
480 #pwm-cells = <0x00000003>;
481 reg = <0x00000000 0x02a00000 0x00000000 0x00010000>;
482 interrupts = <0x00000000 0x00000079 0x00000004>;
483 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
484 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
485 big-endian;
486 status = "disabled";
487 };
488 ftm@2a10000 {
489 reg = <0x00000000 0x02a10000 0x00000000 0x00010000>;
490 interrupts = <0x00000000 0x00000020 0x00000004>;
491 status = "disabled";
492 };
493 ftm@2a20000 {
494 reg = <0x00000000 0x02a20000 0x00000000 0x00010000>;
495 interrupts = <0x00000000 0x00000021 0x00000004>;
496 status = "disabled";
497 };ftm@2a30000 {
498 compatible = "fsl,vf610-ftm-pwm";
499 #pwm-cells = <0x00000003>;
500 reg = <0x00000000 0x02a30000 0x00000000 0x00010000>;
501 interrupts = <0x00000000 0x0000007b 0x00000004>;
502 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
503 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
504 big-endian;
505 status = "okay";
506 };
507 ftm@2a40000 {
508 compatible = "fsl,vf610-ftm-pwm";
509 #pwm-cells = <0x00000003>;
510 reg = <0x00000000 0x02a40000 0x00000000 0x00010000>;
511 interrupts = <0x00000000 0x0000007c 0x00000004>;
512 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
513 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
514 big-endian;
515 status = "okay";
516 };
517 wdog@2ad0000 {
518 compatible = "fsl,ls1021a-wdt", "fsl,imx21-wdt";
519 reg = <0x00000000 0x02ad0000 0x00000000 0x00010000>;
520 interrupts = <0x00000000 0x00000073 0x00000004>;
521 clocks = <0x00000002 0x00000001>;
522 clock-names = "wdog";
523 big-endian;
524 };
525 sai@2b60000 {
526 compatible= "fsl,vf610-sai";
527 reg = <0x00000000 0x02b60000 0x00000000 0x00010000>;
528 interrupts = <0x00000000 0x00000085 0x00000004>;
529 clocks = <0x00000002 0x00000001>;
530 clock-names = "sai";
531 dma-names = "tx", "rx";
532 dmas= <0x00000005 0x00000001 0x0000002d 0x00000005 0x00000001 0x0000002c>;
533 big-endian-regs;
534 status = "okay";
535 linux,phandle = <0x0000000e>;
536 phandle = <0x0000000e>;
537 };
538 edma@2c00000 {
539 #dma-cells = <0x00000002>;
540 compatible = "fsl,vf610-edma";
541 reg = <0x00000000 0x02c00000 0x00000000 0x00010000 0x00000000 0x02c10000 0x00000000 0x00010000 0x00000000 0x02c20000 0x00000000 0x00010000>;
542 interrupts = <0x00000000 0x00000087 0x00000004 0x00000000 0x00000087 0x00000004>;
543 interrupt-names = "edma-tx", "edma-err";
544 dma-channels = <0x00000020>;
545 big-endian;
546 clock-names = "dmamux0", "dmamux1";
547 clocks = <0x00000002 0x00000001 0x00000002 0x00000001>;
548 linux,phandle = <0x00000005>;
549 phandle = <0x00000005>;
550 };
551 dcu@2ce0000 {
552 compatible = "fsl,vf610-dcu";
553 reg = <0x00000000 0x002ce000 0x00000000 0x00010000>;
554 interrupts = <0x00000000 0x000000ac 0x00000004>;
555 clocks = <0x00000002 0x00000001>;
556 clock-names = "dcu";
557 big-endian;
558 status = "okay";
559 display = <0x00000008>;
560 display@0 {
561 bits-per-pixel = <0x00000018>;
562 linux,phandle = <0x00000008>;
563 phandle = <0x00000008>;
564 display-timings {
565 native-mode = <0x00000009>;
566 nl4827hc19 {
567 clock-frequency = <0x00a5dcf0>;
568 hactive = <0x000001e0>;
569 vactive = <0x00000110>;
570 hback-porch = <0x00000002>;
571 hfront-porch = <0x00000002>;
572 vback-porch = <0x00000001>;
573 vfront-porch = <0x00000001>;
574 hsync-len = <0x00000029>;
575 vsync-len = <0x00000002>;
576 hsync-active = <0x00000001>;
577 vsync-active = <0x00000001>;
578 linux,phandle = <0x00000009>;
579 phandle = <0x00000009>;
580 };
581 };
582 };
583 };
584 mdio@2d24000 {
585 #address-cells= <0x00000001>;
586 #size-cells = <0x00000000>;
587 device_type = "mdio";
588 compatible = "gianfar";
589 reg = <0x00000000 0x02d24000 0x00000000 0x00004000>;
590 tbi-phy@8 {
591 reg = <0x00000008>;
592 device_type = "tbi-phy";
593 };
594 ethernet-phy@0 {
595 reg = <0x00000000>;
596 linux,phandle = <0x0000000c>;
597 phandle = <0x0000000c>;
598 };
599 ethernet-phy@1 {
600 reg = <0x00000001>;
601 linux,phandle = <0x0000000d>;
602 phandle = <0x0000000d>;
603 };
604 ethernet-phy@2 {
605 reg = <0x00000002>;
606 linux,phandle = <0x0000000b>;
607 phandle = <0x0000000b>;
608 };
609 tbi-phy@1f {
610 reg =<0x0000001f>;
611 device_type = "tbi-phy";
612 linux,phandle = <0x0000000a>;
613 phandle = <0x0000000a>;
614 };
615 };
616 ethernet@2d10000 {
617 #address-cells = <0x00000002>;
618 #size-cells =<0x00000002>;
619 interrupt-parent = <0x00000001>;
620 device_type = "network";
621 model = "eTSEC";
622 compatible = "fsl,etsec2";
623 fsl,dma-endian-le;
624 fsl,num_rx_queues = <0x00000001>;
625 fsl,num_tx_queues = <0x00000001>;
626 local-mac-address = [00 00 00 00 00 00];
627 ranges;
628 tbi-handle = <0x0000000a>;
629 phy-handle = <0x0000000b>;
630 phy-connection-type = "sgmii";
631 status = "ok";
632 queue-group@0 {
633 #address-cells = <0x00000001>;
634 #size-cells = <0x00000001>;
635 reg = <0x00000000 0x02d10000 0x00000000 0x00008000>;
636 fsl,rx-bit-map = <0x000000ff>;
637 fsl,tx-bit-map = <0x000000ff>;
638 interrupts = <0x00000000 0x00000090 0x00000004 0x00000000 0x00000091 0x00000004 0x00000000 0x00000092 0x00000004>;
639 };};
640 ethernet@2d50000 {
641 #address-cells = <0x00000002>;
642 #size-cells = <0x00000002>;
643 interrupt-parent = <0x00000001>;
644 device_type = "network";
645 model = "eTSEC";
646 compatible = "fsl,etsec2";
647 fsl,dma-endian-le;
648 fsl,num_rx_qeues = <0x00000001>;
649 fsl,num_tx_queues = <0x00000001>;
650 local-mac-address = [00 00 00 00 00 00];
651 ranges;
652 tbi-handle = <0x0000000a>; phy-handle = <0x0000000c>;
653 phy-connection-type = "sgmii";
654 status = "ok";
655 queue-group@0 {
656 #address-cells = <0x00000001>;
657 #size-cells = <0x00000001>;
658 reg = <0x00000000 0x02d50000 0x00000000 0x00008000>;
659 fsl,rx-bit-map =<0x000000ff>;
660 fsl,tx-bit-map = <0x000000ff>;
661 interrupts = <0x00000000 0x00000096 0x00000004 0x00000000 0x00000098 0x00000004 0x00000000 0x00000099 0x00000004>;
662 };
663 };
664 ethernet@2d90000 {
665 #address-cells = <0x00000002>;
666 #size-cells = <0x00000002>;
667 interrupt-parent = <0x00000001>;
668 device_type = "network";
669 model = "eTSEC";
670 compatible = "fsl,etsec2";
671 fsl,dma-endian-le;
672 fsl,num_rx_queues = <0x00000001>;
673 sl,num_tx_queues = <0x00000001>;
674 local-mac-address = [00 00 00 00 00 00];
675 ranges;
676 phy-handle = <0x0000000d>;
677 phy-connection-type = "rgmii-id";
678 status = "ok";
679 queue-group@0 {
680 #address-cells = <0x00000001>;
681 #size-cells = <0x00000001>;
682 reg = <0x00000000 0x02d90000 0x00000000 0x00008000>;
683 fsl,rx-bit-map = <0x000000ff>;
684 fsl,tx-bit-map = <0x000000ff>;
685 interrupts = <0x00000000 0x0000009d 0x00000004 0x00000000 0x0000009e 0x00000004 0x00000000 0x0000009f 0x00000004>;
686 };
687 };
688 usb@8600000 {
689 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
690 reg = <0x00000000 0x08600000 0x00000000 0x00001000>;
691 #address-cells = <0x00000001>;
692 #size-cells = <0x00000000>;
693 interrupts = <0x00000000 0x000000ab 0x00000004>;
694 dr_mode = "host";
695 phy_type = "ulpi";
696 };
697 usb@3100000 {
698 compatible = "fsl,fsl-dwc3";
699 #address-cells = <0x00000002>;
700 #size-cells = <0x00000002>;
701 ranges;
702 dwc3 {
703 compatible = "snps,dwc3";
704 reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
705 interrupts = <0x00000000 0x0000005d 0x00000004>;
706 dr_mode = "host";
707 maximum-speed = "high-speed";
708 };
709 };
710 can@2a70000 {
711 compatible = "fsl,ls1021a-flexcan";
712 reg = <0x00000000 0x02a70000 0x00000000 0x00001000>;
713 interrupts = <0x00000000 0x0000007e 0x00000004>;
714 clocks = <0x00000002 0x00000001>;
715 clock-names = "per";
716 status = "okay";
717 };
718 can@2a80000 {
719 compatible = "fsl,ls1021a-flexcan";
720 reg = <0x00000000 0x02a80000 0x00000000 0x00001000>;
721 interrupts = <0x00000000 0x0000007f 0x00000004>;
722 clocks = <0x00000002 0x00000001>;
723 clock-names = "per";
724 status = "okay";
725 };
726 can@2a90000 {
727 compatible = "fsl,ls1021a-flexcan";
728 reg = <0x00000000 0x02a90000 0x00000000 0x00001000>;
729 interrupts = <0x00000000 0x00000080 0x00000004>;
730 clocks = <0x00000002 0x00000001>;
731 clock-names = "per";
732 status = "disabled";
733 };
734 can@2aa0000 {
735 compatible = "fsl,ls1021a-flexcan";
736 reg = <0x00000000 0x02aa0000 0x00000000 0x00001000>;
737 interrupts = <0x00000000 0x00000081 0x00000004>;
738 clocks = <0x00000002 0x00000001>;
739 clock-names = "per";
740 status = "disabled";
741 };
742 pcie@3400000 {
743 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
744 reg = <0x0 0x3400000 0x0 0x10000 0x40 0x0 0x0 0x2000>;
745 reg-names = "regs", "config";
746 interrupts = <0x0 0xb1 0x4 0x0 0xb3 0x4 0x0 0xb5 0x4>;
747 interrupt-names = "intr", "msi", "pme";
748 fsl,pcie-scfg = <0xb 0x0>;
749 num-atus = <0x6>;
750 #address-cells = <0x3>;
751 #size-cells = <0x2>;
752 device_type = "pci";
753 num-lanes = <0x4>;
754 bus-range = <0x0 0xff>;
755 ranges = <0x81000000 0x0 0x0 0x40 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>;
756 #interrupt-cells = <0x1>;
757 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
758 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5b 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbc 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbe 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc0 0x4>;
759 };
760
761 pcie@3500000 {
762 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
763 reg = <0x0 0x3500000 0x0 0x10000 0x48 0x0 0x0 0x2000>;
764 reg-names = "regs", "config";
765 interrupts = <0x0 0xb2 0x4 0x0 0xb4 0x4 0x0 0xb6 0x4>;
766 interrupt-names = "intr", "msi", "pme";
767 fsl,pcie-scfg = <0xb 0x1>;
768 num-atus = <0x6>;
769 #address-cells = <0x3>;
770 #size-cells = <0x2>;
771 device_type = "pci";
772 num-lanes = <0x2>;
773 bus-range = <0x0 0xff>;
774 ranges = <0x81000000 0x0 0x0 0x48 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>;
775 #interrupt-cells = <0x1>;
776 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
777 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5c 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbd 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbf 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc1 0x4>;
778 };
779 };
780 dcsr@20000000 {
781 #address-cells = <0x00000001>;
782 #size-cells = <0x00000001>;
783 compatible = "fsl,ls1021a-dcsr", "simple-bus";
784 ranges = <0x00000000 0x00000000 0x20000000 0x01000000>;
785 dcsr-epu@0 {
786 compatible = "fsl,ls1021a-dcsr-epu";
787 reg = <0x00000000 0x00010000>;
788 };
789 dcsr-gdi@100000 {
790 compatible = "fsl,ls1021a-dcsr-gdi";
791 reg = <0x00100000 0x00010000>;
792 };
793 dcsr-dddi@120000 {
794 compatible = "fsl,ls1021a-dcsr-dddi";
795 reg = <0x00120000 0x00010000>;
796 };
797 dcsr-dcfg@220000 {
798 compatible = "fsl,ls1021a-dcsr-dcfg";
799 reg = <0x00220000 0x00001000>;
800 };
801 dcsr-clock@221000 {
802 compatible = "fsl,ls1021a-dcsr-clock";
803 reg = <0x00221000 0x00001000>;
804 };
805 dcsr-rcpm@222000 {
806 compatible = "fsl,ls1021a-dcsr-rcpm";
807 reg = <0x00222000 0x00001000 0x00223000 0x00001000>;
808 };
809 dcsr-ccp@225000 {
810 compatible = "fsl,ls1021a-dcsr-ccp";
811 reg = <0x00225000 0x00001000>;
812 };
813 dcsr-fusectrl@226000 {
814 compatible = "fsl,ls1021a-dcsr-fusectrl";
815 reg = <0x00226000 0x00001000>;
816 };
817 dcsr-dap@300000 {
818 compatible = "fsl,ls1021a-dcsr-dap";
819 reg = <0x00300000 0x00010000>;
820 };
821 dcsr-cstf@350000 {
822 compatible = "fsl,ls1021a-dcsr-cstf";
823 reg = <0x00350000 0x00001000 0x003a7000 0x00001000>;
824 };
825 dcsr-a7rom@360000 {
826 compatible = "fsl,ls1021a-dcsr-a7rom";
827 reg = <0x00360000 0x00010000>;
828 };
829 dcsr-a7cpu@370000 {
830 compatible = "fsl,ls1021a-dcsr-a7cpu";
831 reg = <0x00370000 0x00008000>;
832 };
833 dcsr-a7cti@378000 {
834 compatible = "fsl,ls1021a-dcsr-a7cti";
835 reg = <0x00378000 0x00004000>;
836 };
837 dcsr-etm@37c000 {
838 compatible = "fsl,ls1021a-dcsr-etm";
839 reg = <0x0037c000 0x00001000 0x0037d000 0x00003000>;
840 };
841 dcsr-hugorom@3a0000 {
842 compatible = "fsl,ls1021a-dcsr-hugorom";
843 reg = <0x003a0000 0x00001000>;
844 };
845 dcsr-etf@3a1000 {
846 compatible = "fsl,ls1021a-dcsr-etf";
847 reg = <0x003a1000 0x00001000 0x003a2000 0x00001000>;
848 };
849 dcsr-etr@3a3000 {
850 compatible = "fsl,ls1021a-dcsr-etr";
851 reg = <0x003a3000 0x00001000>;
852 };
853 dcsr-cti@3a4000 {
854 compatible = "fsl,ls1021a-dcsr-cti";
855 reg = <0x003a4000 0x00001000 0x003a5000 0x00001000 0x003a6000 0x00001000>;
856 };
857 dcsr-atbrepl@3a8000 {
858 compatible = "fsl,ls1021a-dcsr-atbrepl";
859 reg = <0x003a8000 0x00001000>;
860 };
861 dcsr-tsgen-ctrl@3a9000 {
862 compatible = "fsl,ls1021a-dcsr-tsgen-ctrl";
863 reg = <0x003a9000 0x00001000>;
864 };
865 dcsr-tsgen-read@3aa000 {
866 compatible = "fsl,ls1021a-dcsr-tsgen-read";
867 reg = <0x003aa000 0x00001000>;
868 };
869 };
870 regulators {
871 compatible = "simple-bus";
872 #address-cells = <0x00000001>;
873 #size-cells = <0x00000000>;
874 regulator@0 {
875 compatible = "regulator-fixed";
876 reg = <0x00000000>;
877 regulator-name = "3P3V";
878 regulator-min-microvolt = <0x00325aa0>;
879 regulator-max-microvolt = <0x00325aa0>;
880 regulator-always-on;
881 linux,phandle = <0x00000006>;
882 phandle = <0x00000006>;
883 };
884 };
885 sound {
886 compatible = "fsl,vf610-sgtl5000";
887 simple-audio-card,name = "FSL-VF610-TWR-BOARD";
888 simple-audio-card,routing = "MIC_IN", "Microphone Jack", "Microphone Jack", "Mic Bias", "LINE_IN", "Line In Jack", "Headphone Jack", "HP_OUT", "Speaker Ext", "LINE_OUT";
889 simple-audio-card,cpu = <0x0000000e>;
890 simple-audio-card,codec = <0x0000000f>;
891 };
892};
diff --git a/recipes-kernel/linux/linux-ls1_3.12.bbappend b/recipes-kernel/linux/linux-ls1_3.12.bbappend
index 0d39a59..4edb566 100644
--- a/recipes-kernel/linux/linux-ls1_3.12.bbappend
+++ b/recipes-kernel/linux/linux-ls1_3.12.bbappend
@@ -1,10 +1,11 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2 2
3SRC_URI += "file://ls1021twr_revX3.dts \ 3SRC_URI += "file://ls1021a-iot.dts \
4 " 4 "
5 5
6KERNEL_DEVICETREE = "ls1021twr_revX3.dtb" 6# fix err: "linux-ls1-3.12-r0 do_deploy: Taskhash mismatch"
7ZIMAGE_BASE_NAME[vardepsexclude] = "DATETIME"
7 8
8do_configure_prepend() { 9do_configure_prepend() {
9 cp -rf ${WORKDIR}/ls1021twr_revX3.dts ${S}/arch/arm/boot/dts/ls1021twr_revX3.dts 10 cp -rf ${WORKDIR}/ls1021a-iot.dts ${S}/arch/arm/boot/dts/ls1021a-iot.dts
10} 11}