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authorMartin Borg <martin.borg@enea.com>2017-08-24 15:47:12 +0200
committerMartin Borg <martin.borg@enea.com>2017-08-24 15:47:33 +0200
commit56ae079fefae9bef7bcc1a59d9538f8859f15cc6 (patch)
tree786a7193150dca4af820cec4d0dfb63b16a4a95c
parent1f67cc4f255403abdd64c768f1c5b5d5914c962d (diff)
parent97dc5192259e56be224477602c471d2864d57807 (diff)
downloadmeta-enea-bsp-arm-56ae079fefae9bef7bcc1a59d9538f8859f15cc6.tar.gz
Merge branch 'octeontx-bsp' into pyro
Signed-off-by: Martin Borg <martin.borg@enea.com>
Diffstat
-rw-r--r--README18
-rw-r--r--conf/layer.conf2
-rw-r--r--conf/machine/cn8304.conf10
-rw-r--r--recipes-kernel/linux/linux-cavium-sdk_4.9.bb10
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts541
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts490
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi469
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi762
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts488
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts623
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts992
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts49
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi123
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi123
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/generic-linux.dts54
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi2721
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts165
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts199
-rw-r--r--recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts301
-rw-r--r--recipes-kernel/linux/linux-cavium_4.9.bb36
20 files changed, 8174 insertions, 2 deletions
diff --git a/README b/README
index 9a93c03..608e14f 100644
--- a/README
+++ b/README
@@ -49,15 +49,31 @@ it.
49Assuming the enea-bsp-arm layer exists at the top-level of your 49Assuming the enea-bsp-arm layer exists at the top-level of your
50yocto build tree, you can add it to the build system by adding the 50yocto build tree, you can add it to the build system by adding the
51location of the enea-bsp-arm layer to bblayers.conf, along with any 51location of the enea-bsp-arm layer to bblayers.conf, along with any
52other layers needed. e.g.: 52other layers needed. This is dependent on the Yocto machine you
53need to build for:
53 54
55 -------------------------------------------
56 local.conf
57 MACHINE = "ls1021aiot"
54 58
59 bblayers.conf
55 BBLAYERS ?= " \ 60 BBLAYERS ?= " \
56 /path/to/yocto/meta \ 61 /path/to/yocto/meta \
57 /path/to/yocto/meta-poky \ 62 /path/to/yocto/meta-poky \
58 /path/to/yocto/meta-enea-bsp-common \ 63 /path/to/yocto/meta-enea-bsp-common \
59 /path/to/yocto/meta-freescale \ 64 /path/to/yocto/meta-freescale \
60 " 65 "
66 -------------------------------------------
67 local.conf
68 MACHINE = "cn8304"
69
70 bblayers.conf
71 BBLAYERS ?= " \
72 /path/to/yocto/meta \
73 /path/to/yocto/meta-poky \
74 /path/to/yocto/meta-enea-bsp-common \
75 "
76 -------------------------------------------
61 77
62II. Misc 78II. Misc
63======== 79========
diff --git a/conf/layer.conf b/conf/layer.conf
index 4a40645..2ae610a 100644
--- a/conf/layer.conf
+++ b/conf/layer.conf
@@ -9,4 +9,4 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
9BBFILE_COLLECTIONS += "enea-bsp-arm" 9BBFILE_COLLECTIONS += "enea-bsp-arm"
10BBFILE_PATTERN_enea-bsp-arm = "^${LAYERDIR}/" 10BBFILE_PATTERN_enea-bsp-arm = "^${LAYERDIR}/"
11BBFILE_PRIORITY_enea-bsp-arm = "6" 11BBFILE_PRIORITY_enea-bsp-arm = "6"
12LAYERDEPENDS_enea-bsp-arm = "enea-bsp-common freescale-layer" 12LAYERDEPENDS_enea-bsp-arm = "enea-bsp-common"
diff --git a/conf/machine/cn8304.conf b/conf/machine/cn8304.conf
new file mode 100644
index 0000000..be5687d
--- /dev/null
+++ b/conf/machine/cn8304.conf
@@ -0,0 +1,10 @@
1#@TYPE: Machine
2#@NAME: Cavium CN8304 machine
3#@DESCRIPTION: Cavium CN8304 processor based on OCTEON TX, ARMv8.1 architecture
4
5require conf/machine/include/arm/arch-armv8.inc
6
7PREFERRED_PROVIDER_virtual/kernel ?= "linux-cavium"
8
9SERIAL_CONSOLES = "115200;ttyAMA0"
10KERNEL_IMAGETYPE = "Image"
diff --git a/recipes-kernel/linux/linux-cavium-sdk_4.9.bb b/recipes-kernel/linux/linux-cavium-sdk_4.9.bb
new file mode 100644
index 0000000..5e4cbfe
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium-sdk_4.9.bb
@@ -0,0 +1,10 @@
1require linux-cavium_4.9.bb
2
3# Debug tools support
4KERNEL_FEATURES_append = " features/debug/debug_kernel_y.scc"
5KERNEL_FEATURES_append = " features/kgdb/kgdb_y.scc"
6KERNEL_FEATURES_append = " features/lttng/lttng_y.scc"
7KERNEL_FEATURES_append = " features/latencytop/latencytop_y.scc"
8KERNEL_FEATURES_append = " features/perf/perf_y.scc"
9KERNEL_FEATURES_append = " features/systemtap/systemtap_y.scc"
10KERNEL_FEATURES_append = " features/oprofile/oprofile_y.scc"
diff --git a/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts b/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts
new file mode 100644
index 0000000..006e00e
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/asim-cn81xx-linux.dts
@@ -0,0 +1,541 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 rgmii00: rgmii00 {
58 reg = <3> ;
59 compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22";
60 };
61 };
62
63 mdio1@87e005003880 {
64 sgmii00: sgmii00 {
65 qlm-mode = "0x000,sgmii";
66 reg = <0> ;
67 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
68 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii01: sgmii01 {
75 qlm-mode = "0x001,sgmii";
76 reg = <1> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 sgmii02: sgmii02 {
84 qlm-mode = "0x002,sgmii";
85 reg = <2> ;
86 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
87 marvell,reg-init = <3 0x10 0 0x8665>,
88 <3 0x11 0 0x00aa>,
89 <3 0x12 0 0x4105>,
90 <3 0x13 0 0x8a08>;
91 };
92 sgmii03: sgmii03 {
93 qlm-mode = "0x003,sgmii";
94 reg = <3> ;
95 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
96 marvell,reg-init = <3 0x10 0 0x8665>,
97 <3 0x11 0 0x00aa>,
98 <3 0x12 0 0x4105>,
99 <3 0x13 0 0x8a08>;
100 };
101 xfi00: xfi00 {
102 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
103 reg = <0> ;
104 compatible = "cortina,cs4223-slice";
105 };
106 xfi01: xfi01 {
107 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
108 reg = <1> ;
109 compatible = "cortina,cs4223-slice";
110 };
111 xfi02: xfi02 {
112 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
113 reg = <2> ;
114 compatible = "cortina,cs4223-slice";
115 };
116 xfi03: xfi03 {
117 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
118 reg = <3> ;
119 compatible = "cortina,cs4223-slice";
120 };
121 xlaui00: xlaui00 {
122 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
123 reg = <0> ;
124 compatible = "cortina,cs4223-slice";
125 };
126 xaui00: xaui00 {
127 qlm-mode = "0x000,xaui";
128 reg = <0> ;
129 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
130 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
131 };
132 rxaui00: rxaui00 {
133 qlm-mode = "0x000,rxaui";
134 reg = <0> ;
135 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
136 };
137 rxaui01: rxaui01 {
138 qlm-mode = "0x001,rxaui";
139 reg = <2> ;
140 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
141 };
142 qsgmii00: qsgmii00 {
143 qlm-mode = "0x000,qsgmii";
144 reg = <0> ;
145 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
146 };
147 qsgmii01: qsgmii01 {
148 qlm-mode = "0x001,qsgmii";
149 reg = <1> ;
150 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
151 };
152 qsgmii02: qsgmii02 {
153 qlm-mode = "0x002,qsgmii";
154 reg = <2> ;
155 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
156 };
157 qsgmii03: qsgmii03 {
158 qlm-mode = "0x003,qsgmii";
159 reg = <3> ;
160 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
161 };
162
163 sgmii10: sgmii10 {
164 qlm-mode = "0x010,sgmii";
165 reg = <8> ;
166 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
167 marvell,reg-init = <3 0x10 0 0x8665>,
168 <3 0x11 0 0x00aa>,
169 <3 0x12 0 0x4105>,
170 <3 0x13 0 0x8a08>;
171 };
172 sgmii11: sgmii11 {
173 qlm-mode = "0x011,sgmii";
174 reg = <9> ;
175 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
176 marvell,reg-init = <3 0x10 0 0x8665>,
177 <3 0x11 0 0x00aa>,
178 <3 0x12 0 0x4105>,
179 <3 0x13 0 0x8a08>;
180 };
181 sgmii12: sgmii12 {
182 qlm-mode = "0x012,sgmii";
183 reg = <10> ;
184 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
185 marvell,reg-init = <3 0x10 0 0x8665>,
186 <3 0x11 0 0x00aa>,
187 <3 0x12 0 0x4105>,
188 <3 0x13 0 0x8a08>;
189 };
190 sgmii13: sgmii13 {
191 qlm-mode = "0x013,sgmii";
192 reg = <11> ;
193 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
194 marvell,reg-init = <3 0x10 0 0x8665>,
195 <3 0x11 0 0x00aa>,
196 <3 0x12 0 0x4105>,
197 <3 0x13 0 0x8a08>;
198 };
199 xfi10: xfi10 {
200 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
201 reg = <8> ;
202 compatible = "cortina,cs4223-slice";
203 };
204 xfi11: xfi11 {
205 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
206 reg = <9> ;
207 compatible = "cortina,cs4223-slice";
208 };
209 xfi12: xfi12 {
210 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
211 reg = <10> ;
212 compatible = "cortina,cs4223-slice";
213 };
214 xfi13: xfi13 {
215 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
216 reg = <11> ;
217 compatible = "cortina,cs4223-slice";
218 };
219 xlaui10: xlaui10 {
220 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
221 reg = <8> ;
222 compatible = "cortina,cs4223-slice";
223 };
224 xaui10: xaui10 {
225 qlm-mode = "0x010,xaui";
226 reg = <8> ;
227 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
228 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
229 };
230 rxaui10: rxaui10 {
231 qlm-mode = "0x010,rxaui";
232 reg = <8> ;
233 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
234 };
235 rxaui11: rxaui11 {
236 qlm-mode = "0x011,rxaui";
237 reg = <10> ;
238 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
239 };
240 qsgmii10: qsgmii10 {
241 qlm-mode = "0x010,qsgmii";
242 reg = <8> ;
243 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
244 };
245 qsgmii11: qsgmii11 {
246 qlm-mode = "0x011,qsgmii";
247 reg = <9> ;
248 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
249 };
250 qsgmii12: qsgmii12 {
251 qlm-mode = "0x012,qsgmii";
252 reg = <10> ;
253 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
254 };
255 qsgmii13: qsgmii13 {
256 qlm-mode = "0x013,qsgmii";
257 reg = <11> ;
258 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
259 };
260 };
261 };
262
263 rgx0 {
264 rgmii00 {
265 reg = <3>;
266 local-mac-address = [00 00 00 00 00 00];
267 phy-handle = <&rgmii00>;
268 };
269 };
270
271 bgx0 {
272 /* typename+qlm+typenumber eg :
273 sgmii+bgx0+sgmmi0
274 */
275 // SGMII
276 sgmii00 {
277 reg = <0>;
278 qlm-mode = "0x000,sgmii";
279 local-mac-address = [00 00 00 00 00 00];
280 phy-handle = <&sgmii00>;
281 };
282 sgmii01 {
283 reg = <1>;
284 qlm-mode = "0x001,sgmii";
285 local-mac-address = [00 00 00 00 00 00];
286 phy-handle = <&sgmii01>;
287 };
288 sgmii02 {
289 reg = <2>;
290 qlm-mode = "0x002,sgmii";
291 local-mac-address = [00 00 00 00 00 00];
292 phy-handle = <&sgmii02>;
293 };
294 sgmii03 {
295 reg = <3>;
296 qlm-mode = "0x003,sgmii";
297 local-mac-address = [00 00 00 00 00 00];
298 phy-handle = <&sgmii03>;
299 };
300 xfi00 {
301 reg = <0>;
302 qlm-mode = "0x000,xfi";
303 local-mac-address = [00 00 00 00 00 00];
304 phy-handle = <&xfi00>;
305 };
306 xfi01 {
307 reg = <1>;
308 qlm-mode = "0x001,xfi";
309 local-mac-address = [00 00 00 00 00 00];
310 phy-handle = <&xfi01>;
311 };
312 xfi02 {
313 reg = <2>;
314 qlm-mode = "0x002,xfi";
315 local-mac-address = [00 00 00 00 00 00];
316 phy-handle = <&xfi02>;
317 };
318 xfi03 {
319 reg = <3>;
320 qlm-mode = "0x003,xfi";
321 local-mac-address = [00 00 00 00 00 00];
322 phy-handle = <&xfi03>;
323 };
324 // 10g-kr
325 xfi-10g-kr00 {
326 reg = <0>;
327 qlm-mode = "0x000,xfi-10g-kr";
328 local-mac-address = [00 00 00 00 00 00];
329 phy-handle = <&xfi00>;
330 };
331 xfi-10g-kr01 {
332 reg = <1>;
333 qlm-mode = "0x001,xfi-10g-kr";
334 local-mac-address = [00 00 00 00 00 00];
335 phy-handle = <&xfi01>;
336 };
337 xfi-10g-kr02 {
338 reg = <2>;
339 qlm-mode = "0x002,xfi-10g-kr";
340 local-mac-address = [00 00 00 00 00 00];
341 phy-handle = <&xfi02>;
342 };
343 xfi-10g-kr03 {
344 reg = <3>;
345 qlm-mode = "0x003,xfi-10g-kr";
346 local-mac-address = [00 00 00 00 00 00];
347 phy-handle = <&xfi03>;
348 };
349 xlaui00 {
350 reg = <0>;
351 qlm-mode = "0x000,xlaui";
352 local-mac-address = [00 00 00 00 00 00];
353 phy-handle = <&xlaui00>;
354 };
355 xlaui-40g-kr00 {
356 reg = <0>;
357 qlm-mode = "0x000,xlaui-40g-kr";
358 local-mac-address = [00 00 00 00 00 00];
359 phy-handle = <&xlaui00>;
360 };
361 xaui00 {
362 reg = <0>;
363 qlm-mode = "0x000,xaui";
364 local-mac-address = [00 00 00 00 00 00];
365 phy-handle = <&xaui00>;
366 };
367 rxaui00 {
368 reg = <0>;
369 qlm-mode = "0x000,rxaui";
370 local-mac-address = [00 00 00 00 00 00];
371 phy-handle = <&rxaui00>;
372 };
373 rxaui01 {
374 reg = <1>;
375 qlm-mode = "0x001,rxaui";
376 local-mac-address = [00 00 00 00 00 00];
377 phy-handle = <&rxaui01>;
378 };
379 qsgmii00 {
380 reg = <0>;
381 qlm-mode = "0x000,qsgmii";
382 local-mac-address = [00 00 00 00 00 00];
383 phy-handle = <&qsgmii00>;
384 };
385 qsgmii01 {
386 reg = <1>;
387 qlm-mode = "0x001,qsgmii";
388 local-mac-address = [00 00 00 00 00 00];
389 phy-handle = <&qsgmii01>;
390 };
391 qsgmii02 {
392 reg = <2>;
393 qlm-mode = "0x002,qsgmii";
394 local-mac-address = [00 00 00 00 00 00];
395 phy-handle = <&qsgmii02>;
396 };
397 qsgmii03 {
398 reg = <3>;
399 qlm-mode = "0x003,qsgmii";
400 local-mac-address = [00 00 00 00 00 00];
401 phy-handle = <&qsgmii03>;
402 };
403 };
404 bgx1 {
405 sgmii10 {
406 reg = <0>;
407 qlm-mode = "0x010,sgmii";
408 local-mac-address = [00 00 00 00 00 00];
409 phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */
410 };
411 sgmii11 {
412 reg = <1>;
413 qlm-mode = "0x011,sgmii";
414 local-mac-address = [00 00 00 00 00 00];
415 phy-handle = <&sgmii11>;
416 };
417 sgmii12 {
418 reg = <2>;
419 qlm-mode = "0x012,sgmii";
420 local-mac-address = [00 00 00 00 00 00];
421 phy-handle = <&sgmii12>;
422 };
423 sgmii13 {
424 reg = <3>;
425 qlm-mode = "0x013,sgmii";
426 local-mac-address = [00 00 00 00 00 00];
427 phy-handle = <&sgmii13>;
428 };
429 xfi10 {
430 reg = <0>;
431 qlm-mode = "0x010,xfi";
432 local-mac-address = [00 00 00 00 00 00];
433 phy-handle = <&xfi10>;
434 };
435 xfi11 {
436 reg = <1>;
437 qlm-mode = "0x011,xfi";
438 local-mac-address = [00 00 00 00 00 00];
439 phy-handle = <&xfi11>;
440 };
441 xfi12 {
442 reg = <2>;
443 qlm-mode = "0x012,xfi";
444 local-mac-address = [00 00 00 00 00 00];
445 phy-handle = <&xfi12>;
446 };
447 xfi13 {
448 reg = <3>;
449 qlm-mode = "0x013,xfi";
450 local-mac-address = [00 00 00 00 00 00];
451 phy-handle = <&xfi13>;
452 };
453 // 10g_kr
454 xfi-10g-kr10 {
455 reg = <0>;
456 qlm-mode = "0x010,xfi-10g-kr";
457 local-mac-address = [00 00 00 00 00 00];
458 phy-handle = <&xfi10>;
459 };
460 xfi-10g-kr11 {
461 reg = <1>;
462 qlm-mode = "0x011,xfi-10g-kr";
463 local-mac-address = [00 00 00 00 00 00];
464 phy-handle = <&xfi11>;
465 };
466 xfi-10g-kr12 {
467 reg = <2>;
468 qlm-mode = "0x012,xfi-10g-kr";
469 local-mac-address = [00 00 00 00 00 00];
470 phy-handle = <&xfi12>;
471 };
472 xfi-10g-kr13 {
473 reg = <3>;
474 qlm-mode = "0x013,xfi-10g-kr";
475 local-mac-address = [00 00 00 00 00 00];
476 phy-handle = <&xfi13>;
477 };
478 xlaui10 {
479 reg = <0>;
480 qlm-mode = "0x010,xlaui";
481 local-mac-address = [00 00 00 00 00 00];
482 phy-handle = <&xlaui10>;
483 };
484 xlaui-40g-kr-10 {
485 reg = <0>;
486 qlm-mode = "0x010,xlaui-40g-kr";
487 local-mac-address = [00 00 00 00 00 00];
488 phy-handle = <&xlaui10>;
489 };
490 xaui10 {
491 reg = <0>;
492 qlm-mode = "0x010,xaui";
493 local-mac-address = [00 00 00 00 00 00];
494 phy-handle = <&xaui10>;
495 };
496 rxaui10 {
497 reg = <8>;
498 qlm-mode = "0x010,rxaui";
499 local-mac-address = [00 00 00 00 00 00];
500 phy-handle = <&rxaui10>;
501 };
502 rxaui11 {
503 reg = <9>;
504 qlm-mode = "0x011,rxaui";
505 local-mac-address = [00 00 00 00 00 00];
506 phy-handle = <&rxaui11>;
507 };
508 qsgmii10 {
509 reg = <0>;
510 qlm-mode = "0x010,qsgmii";
511 local-mac-address = [00 00 00 00 00 00];
512 phy-handle = <&qsgmii10>;
513 };
514 qsgmii11 {
515 reg = <1>;
516 qlm-mode = "0x011,qsgmii";
517 local-mac-address = [00 00 00 00 00 00];
518 phy-handle = <&qsgmii11>;
519 };
520 qsgmii12 {
521 reg = <2>;
522 qlm-mode = "0x012,qsgmii";
523 local-mac-address = [00 00 00 00 00 00];
524 phy-handle = <&qsgmii12>;
525 };
526 qsgmii13 {
527 reg = <3>;
528 qlm-mode = "0x013,qsgmii";
529 local-mac-address = [00 00 00 00 00 00];
530 phy-handle = <&qsgmii13>;
531 };
532 };
533};
534
535&i2c_9_0 {
536 rtc@68 {
537 compatible = "dallas,ds1337";
538 reg = <0x68>;
539 };
540};
541
diff --git a/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts b/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts
new file mode 100644
index 0000000..e1c90f7
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/asim-cn83xx-linux.dts
@@ -0,0 +1,490 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn83xx-linux.dtsi"
53
54/ {
55 soc@0 {
56 uaa0: serial@87e028000000 {
57 compatible = "arm,pl011", "arm,primecell";
58 reg = <0x87e0 0x28000000 0x0 0x1000>;
59 interrupts = <0 5 4>;
60 clocks = <&refclkuaa>;
61 clock-names = "apb_pclk";
62 uboot,skip-init;
63 };
64
65 uaa1: serial@87e029000000 {
66 compatible = "arm,pl011", "arm,primecell";
67 reg = <0x87e0 0x29000000 0x0 0x1000>;
68 interrupts = <0 6 4>;
69 clocks = <&refclkuaa>;
70 clock-names = "apb_pclk";
71 uboot,skip-init;
72 };
73
74 uaa2: serial@87e02a000000 {
75 compatible = "arm,pl011", "arm,primecell";
76 reg = <0x87e0 0x2a000000 0x0 0x1000>;
77 interrupts = <0 7 4>;
78 clocks = <&refclkuaa>;
79 clock-names = "apb_pclk";
80 uboot,skip-init;
81 };
82
83 uaa3: serial@87e02b000000 {
84 compatible = "arm,pl011", "arm,primecell";
85 reg = <0x87e0 0x2b000000 0x0 0x1000>;
86 interrupts = <0 8 4>;
87 clocks = <&refclkuaa>;
88 clock-names = "apb_pclk";
89 uboot,skip-init;
90 };
91
92 pci@848000000000 {
93 mrml-bridge0@1,0 {
94 mdio-nexus@1,3 {
95 mdio0@87e005003800 {
96 compatible = "cavium,thunder-8890-mdio";
97 #address-cells = <1>;
98 #size-cells = <0>;
99 reg = <0x87e0 0x05003800 0x0 0x30>;
100
101 sgmii00: sgmii00 {
102 qlm-mode = "0x000,sgmii";
103 reg = <0> ;
104 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
105 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
106 marvell,reg-init = <3 0x10 0 0x8665>,
107 <3 0x11 0 0x00aa>,
108 <3 0x12 0 0x4105>,
109 <3 0x13 0 0x8a08>;
110
111 };
112 sgmii01: sgmii01 {
113 qlm-mode = "0x001,sgmii";
114 reg = <1> ;
115 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
116 marvell,reg-init = <3 0x10 0 0x8665>,
117 <3 0x11 0 0x00aa>,
118 <3 0x12 0 0x4105>,
119 <3 0x13 0 0x8a08>;
120 };
121 sgmii02: sgmii02 {
122 qlm-mode = "0x002,sgmii";
123 reg = <2> ;
124 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
125 marvell,reg-init = <3 0x10 0 0x8665>,
126 <3 0x11 0 0x00aa>,
127 <3 0x12 0 0x4105>,
128 <3 0x13 0 0x8a08>;
129 };
130 sgmii03: sgmii03 {
131 qlm-mode = "0x003,sgmii";
132 reg = <3> ;
133 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
134 marvell,reg-init = <3 0x10 0 0x8665>,
135 <3 0x11 0 0x00aa>,
136 <3 0x12 0 0x4105>,
137 <3 0x13 0 0x8a08>;
138 };
139 xfi00: xfi00 {
140 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
141 reg = <0> ;
142 compatible = "cortina,cs4223-slice";
143 };
144 xfi01: xfi01 {
145 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
146 reg = <1> ;
147 compatible = "cortina,cs4223-slice";
148 };
149 xfi02: xfi02 {
150 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
151 reg = <2> ;
152 compatible = "cortina,cs4223-slice";
153 };
154 xfi03: xfi03 {
155 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
156 reg = <3> ;
157 compatible = "cortina,cs4223-slice";
158 };
159 xlaui00: xlaui00 {
160 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
161 reg = <0> ;
162 compatible = "cortina,cs4223-slice";
163 };
164 xaui00: xaui00 {
165 qlm-mode = "0x000,xaui";
166 reg = <0> ;
167 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
168 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
169 };
170 rxaui00: rxaui00 {
171 qlm-mode = "0x000,rxaui";
172 reg = <0> ;
173 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
174 };
175 rxaui01: rxaui01 {
176 qlm-mode = "0x001,rxaui";
177 reg = <1> ;
178 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
179 };
180 qsgmii00: qsgmii00 {
181 qlm-mode = "0x000,qsgmii";
182 reg = <0> ;
183 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
184 };
185 qsgmii01: qsgmii01 {
186 qlm-mode = "0x001,qsgmii";
187 reg = <1> ;
188 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
189 };
190 qsgmii02: qsgmii02 {
191 qlm-mode = "0x002,qsgmii";
192 reg = <2> ;
193 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
194 };
195 qsgmii03: qsgmii03 {
196 qlm-mode = "0x003,qsgmii";
197 reg = <3> ;
198 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
199 };
200
201 sgmii10: sgmii10 {
202 qlm-mode = "0x010,sgmii";
203 reg = <8> ;
204 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
205 marvell,reg-init = <3 0x10 0 0x8665>,
206 <3 0x11 0 0x00aa>,
207 <3 0x12 0 0x4105>,
208 <3 0x13 0 0x8a08>;
209 };
210 sgmii11: sgmii11 {
211 qlm-mode = "0x011,sgmii";
212 reg = <9> ;
213 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
214 marvell,reg-init = <3 0x10 0 0x8665>,
215 <3 0x11 0 0x00aa>,
216 <3 0x12 0 0x4105>,
217 <3 0x13 0 0x8a08>;
218 };
219 sgmii12: sgmii12 {
220 qlm-mode = "0x012,sgmii";
221 reg = <2> ;
222 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
223 marvell,reg-init = <3 0x10 0 0x8665>,
224 <3 0x11 0 0x00aa>,
225 <3 0x12 0 0x4105>,
226 <3 0x13 0 0x8a08>;
227 };
228 sgmii13: sgmii13 {
229 qlm-mode = "0x013,sgmii";
230 reg = <3> ;
231 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
232 marvell,reg-init = <3 0x10 0 0x8665>,
233 <3 0x11 0 0x00aa>,
234 <3 0x12 0 0x4105>,
235 <3 0x13 0 0x8a08>;
236 };
237 xfi10: xfi10 {
238 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
239 reg = <8> ;
240 compatible = "cortina,cs4223-slice";
241 };
242 xfi11: xfi11 {
243 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
244 reg = <9> ;
245 compatible = "cortina,cs4223-slice";
246 };
247 xfi12: xfi12 {
248 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
249 reg = <10> ;
250 compatible = "cortina,cs4223-slice";
251 };
252 xfi13: xfi13 {
253 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
254 reg = <11> ;
255 compatible = "cortina,cs4223-slice";
256 };
257 xlaui10: xlaui10 {
258 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
259 reg = <8> ;
260 compatible = "cortina,cs4223-slice";
261 };
262 xaui10: xaui10 {
263 qlm-mode = "0x010,xaui";
264 reg = <8> ;
265 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
266 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
267 };
268 rxaui10: rxaui10 {
269 qlm-mode = "0x010,rxaui";
270 reg = <8> ;
271 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
272 };
273 rxaui11: rxaui11 {
274 qlm-mode = "0x011,rxaui";
275 reg = <9> ;
276 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
277 };
278 qsgmii10: qsgmii10 {
279 qlm-mode = "0x010,qsgmii";
280 reg = <8> ;
281 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
282 };
283 qsgmii11: qsgmii11 {
284 qlm-mode = "0x011,qsgmii";
285 reg = <9> ;
286 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
287 };
288 qsgmii12: qsgmii12 {
289 qlm-mode = "0x012,qsgmii";
290 reg = <10> ;
291 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
292 };
293 qsgmii13: qsgmii13 {
294 qlm-mode = "0x013,qsgmii";
295 reg = <11> ;
296 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
297 };
298 };
299
300 mdio1@87e005003880 {
301 compatible = "cavium,thunder-8890-mdio";
302 #address-cells = <1>;
303 #size-cells = <0>;
304 reg = <0x87e0 0x05003880 0x0 0x30>;
305
306 sgmii20: sgmii20 {
307 qlm-mode = "0x020,sgmii";
308 reg = <0> ;
309 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
310 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
311 marvell,reg-init = <3 0x10 0 0x8665>,
312 <3 0x11 0 0x00aa>,
313 <3 0x12 0 0x4105>,
314 <3 0x13 0 0x8a08>;
315
316 };
317 sgmii21: sgmii21 {
318 qlm-mode = "0x021,sgmii";
319 reg = <1> ;
320 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
321 marvell,reg-init = <3 0x10 0 0x8665>,
322 <3 0x11 0 0x00aa>,
323 <3 0x12 0 0x4105>,
324 <3 0x13 0 0x8a08>;
325 };
326 sgmii22: sgmii22 {
327 qlm-mode = "0x022,sgmii";
328 reg = <2> ;
329 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
330 marvell,reg-init = <3 0x10 0 0x8665>,
331 <3 0x11 0 0x00aa>,
332 <3 0x12 0 0x4105>,
333 <3 0x13 0 0x8a08>;
334 };
335 sgmii23: sgmii23 {
336 qlm-mode = "0x023,sgmii";
337 reg = <3> ;
338 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
339 marvell,reg-init = <3 0x10 0 0x8665>,
340 <3 0x11 0 0x00aa>,
341 <3 0x12 0 0x4105>,
342 <3 0x13 0 0x8a08>;
343 };
344 xfi20: xfi20 {
345 qlm-mode = "0x020,xfi","0x020,xfi-10g-kr";
346 reg = <0> ;
347 compatible = "cortina,cs4223-slice";
348 };
349 xfi21: xfi21 {
350 qlm-mode = "0x021,xfi","0x021,xfi-10g-kr";
351 reg = <1> ;
352 compatible = "cortina,cs4223-slice";
353 };
354 xfi22: xfi22 {
355 qlm-mode = "0x022,xfi","0x022,xfi-10g-kr";
356 reg = <2> ;
357 compatible = "cortina,cs4223-slice";
358 };
359 xfi23: xfi23 {
360 qlm-mode = "0x023,xfi","0x023,xfi-10g-kr";
361 reg = <3> ;
362 compatible = "cortina,cs4223-slice";
363 };
364 xlaui20: xlaui20 {
365 qlm-mode = "0x020,xlaui","0x020,xlaui-40g-kr";
366 reg = <0> ;
367 compatible = "cortina,cs4223-slice";
368 };
369 xaui20: xaui20 {
370 qlm-mode = "0x020,xaui";
371 reg = <0> ;
372 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
373 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
374 };
375 rxaui20: rxaui20 {
376 qlm-mode = "0x020,rxaui";
377 reg = <0> ;
378 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
379 };
380 rxaui21: rxaui21 {
381 qlm-mode = "0x021,rxaui";
382 reg = <1> ;
383 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
384 };
385 qsgmii20: qsgmii20 {
386 qlm-mode = "0x020,qsgmii";
387 reg = <0> ;
388 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
389 };
390 qsgmii21: qsgmii21 {
391 qlm-mode = "0x021,qsgmii";
392 reg = <1> ;
393 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
394 };
395 qsgmii22: qsgmii22 {
396 qlm-mode = "0x022,qsgmii";
397 reg = <2> ;
398 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
399 };
400 qsgmii23: qsgmii23 {
401 qlm-mode = "0x023,qsgmii";
402 reg = <3> ;
403 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
404 };
405
406 sgmii30: sgmii30 {
407 qlm-mode = "0x030,sgmii";
408 reg = <8> ;
409 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
410 marvell,reg-init = <3 0x10 0 0x8665>,
411 <3 0x11 0 0x00aa>,
412 <3 0x12 0 0x4105>,
413 <3 0x13 0 0x8a08>;
414 };
415 sgmii31: sgmii31 {
416 qlm-mode = "0x011,sgmii";
417 reg = <9> ;
418 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
419 marvell,reg-init = <3 0x10 0 0x8665>,
420 <3 0x11 0 0x00aa>,
421 <3 0x12 0 0x4105>,
422 <3 0x13 0 0x8a08>;
423 };
424 xfi30: xfi30 {
425 qlm-mode = "0x030,xfi","0x030,xfi-10g-kr";
426 reg = <8> ;
427 compatible = "cortina,cs4223-slice";
428 };
429 xfi31: xfi31 {
430 qlm-mode = "0x031,xfi","0x031,xfi-10g-kr";
431 reg = <9> ;
432 compatible = "cortina,cs4223-slice";
433 };
434 xfi32: xfi32 {
435 qlm-mode = "0x032,xfi","0x032,xfi-10g-kr";
436 reg = <10> ;
437 compatible = "cortina,cs4223-slice";
438 };
439 xfi33: xfi33 {
440 qlm-mode = "0x033,xfi","0x033,xfi-10g-kr";
441 reg = <11> ;
442 compatible = "cortina,cs4223-slice";
443 };
444 xlaui30: xlaui30 {
445 qlm-mode = "0x030,xlaui","0x030,xlaui-40g-kr";
446 reg = <8> ;
447 compatible = "cortina,cs4223-slice";
448 };
449 xaui30: xaui30 {
450 qlm-mode = "0x030,xaui";
451 reg = <8> ;
452 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
453 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
454 };
455 rxaui30: rxaui30 {
456 qlm-mode = "0x030,rxaui";
457 reg = <8> ;
458 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
459 };
460 rxaui31: rxaui31 {
461 qlm-mode = "0x031,rxaui";
462 reg = <9> ;
463 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
464 };
465 qsgmii30: qsgmii30 {
466 qlm-mode = "0x030,qsgmii";
467 reg = <8> ;
468 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
469 };
470 qsgmii31: qsgmii31 {
471 qlm-mode = "0x031,qsgmii";
472 reg = <9> ;
473 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
474 };
475 qsgmii32: qsgmii32 {
476 qlm-mode = "0x032,qsgmii";
477 reg = <10> ;
478 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
479 };
480 qsgmii33: qsgmii33 {
481 qlm-mode = "0x033,qsgmii";
482 reg = <11> ;
483 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
484 };
485 };
486 };
487 };
488 };
489 };
490};
diff --git a/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi
new file mode 100644
index 0000000..7a36ea4
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/cn81xx-linux.dtsi
@@ -0,0 +1,469 @@
1/*
2 * Cavium Thunder DTS file - Thunder SoC description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/ {
51 model = "Cavium ThunderX CN81XX board";
52 compatible = "cavium,thunder-81xx";
53 interrupt-parent = <&gic0>;
54 #address-cells = <2>;
55 #size-cells = <2>;
56
57 psci {
58 compatible = "arm,psci-0.2";
59 method = "smc";
60 };
61
62 cpus {
63 #address-cells = <2>;
64 #size-cells = <0>;
65
66 cpu-map {
67 cluster0 {
68 core0 {
69 cpu = <&CPU0>;
70 };
71 core1 {
72 cpu = <&CPU1>;
73 };
74 core2 {
75 cpu = <&CPU2>;
76 };
77 core3 {
78 cpu = <&CPU3>;
79 };
80 };
81 };
82
83 CPU0: cpu@0 {
84 device_type = "cpu";
85 compatible = "cavium,thunder", "arm,armv8";
86 reg = <0x0 0x000>;
87 enable-method = "psci";
88 /* socket 0 */
89 numa-node-id = <0>;
90 next-level-cache = <&thunderx_L2_0>;
91 };
92 CPU1: cpu@1 {
93 device_type = "cpu";
94 compatible = "cavium,thunder", "arm,armv8";
95 reg = <0x0 0x001>;
96 enable-method = "psci";
97 numa-node-id = <0>;
98 next-level-cache = <&thunderx_L2_0>;
99 };
100 CPU2: cpu@2 {
101 device_type = "cpu";
102 compatible = "cavium,thunder", "arm,armv8";
103 reg = <0x0 0x002>;
104 enable-method = "psci";
105 numa-node-id = <0>;
106 next-level-cache = <&thunderx_L2_0>;
107 };
108 CPU3: cpu@3 {
109 device_type = "cpu";
110 compatible = "cavium,thunder", "arm,armv8";
111 reg = <0x0 0x003>;
112 enable-method = "psci";
113 numa-node-id = <0>;
114 next-level-cache = <&thunderx_L2_0>;
115 };
116 };
117
118 thunderx_L2_0: l2-cache0 {
119 compatible = "cache";
120 numa-node-id = <0>;
121 };
122
123 timer {
124 compatible = "arm,armv8-timer";
125 interrupts = <1 13 4>,
126 <1 14 4>,
127 <1 11 4>,
128 <1 10 4>;
129 };
130
131 pmu {
132 compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
133 interrupts = <1 7 4>;
134 };
135
136 gic0: interrupt-controller@801000000000 {
137 compatible = "arm,gic-v3";
138 #interrupt-cells = <3>;
139 #address-cells = <2>;
140 #size-cells = <2>;
141 #redistributor-regions = <1>;
142 ranges;
143 interrupt-controller;
144 reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
145 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
146 interrupts = <1 9 4>;
147
148 its: gic-its@801000020000 {
149 compatible = "arm,gic-v3-its";
150 reg = <0x8010 0x20000 0x0 0x200000>;
151 msi-controller;
152 numa-node-id = <0>;
153 };
154 };
155
156 soc@0 {
157 compatible = "simple-bus";
158 #address-cells = <2>;
159 #size-cells = <2>;
160 ranges;
161 numa-node-id = <0>;
162
163 refclkuaa: refclkuaa {
164 compatible = "fixed-clock";
165 #clock-cells = <0>;
166 clock-frequency = <116640000>;
167 clock-output-names = "refclkuaa";
168 };
169
170 sclk: sclk {
171 compatible = "fixed-clock";
172 #clock-cells = <0>;
173 clock-frequency = <800000000>;
174 clock-output-names = "sclk";
175 };
176
177 uaa0: serial@87e028000000 {
178 compatible = "arm,pl011", "arm,primecell";
179 reg = <0x87e0 0x28000000 0x0 0x1000>;
180 interrupts = <0 5 4>;
181 clocks = <&refclkuaa>;
182 clock-names = "apb_pclk";
183 uboot,skip-init;
184 };
185
186 uaa1: serial@87e029000000 {
187 compatible = "arm,pl011", "arm,primecell";
188 reg = <0x87e0 0x29000000 0x0 0x1000>;
189 interrupts = <0 6 4>;
190 clocks = <&refclkuaa>;
191 clock-names = "apb_pclk";
192 uboot,skip-init;
193 };
194
195 watch-dog@8440000a0000 {
196 compatible = "arm,sbsa-gwdt";
197 reg = <0x8440 0xa0000 0x0 0x1000>, <0x8440 0xb0000 0x0 0x1000>;
198 interrupts = <0 9 4>;
199 };
200
201 pbus0: nor@0 {
202 compatible = "cfi-flash";
203 reg = <0x8000 0x0 0x0 0x800000>;
204 device-width = <1>;
205 bank-width = <1>;
206 clocks = <&sclk>;
207 };
208
209 smmu0@830000000000 {
210 compatible = "cavium,smmu-v2";
211 reg = <0x8300 0x0 0x0 0x2000000>;
212 #global-interrupts = <1>;
213 interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
214 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
215 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
216 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
217 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
218 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
219 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
220 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
221 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
222 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
223 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>;
224
225 mmu-masters = <&ecam0 0x100>,
226 <&pem0 0x200>,
227 <&pem1 0x300>,
228 <&pem2 0x400>;
229
230 };
231
232 ecam0: pci@848000000000 {
233 compatible = "pci-host-ecam-generic";
234 device_type = "pci";
235 msi-parent = <&its>;
236 msi-map = <0 &its 0 0x10000>;
237 bus-range = <0 31>;
238 #size-cells = <2>;
239 #address-cells = <3>;
240 #stream-id-cells = <1>;
241 u-boot,dm-pre-reloc;
242 dma-coherent;
243 reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */
244 ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x080 0x00000000>, /* mem ranges */
245 <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>, /* SATA */
246 <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x28000000>, /* UARTs */
247 <0x03000000 0x87e0 0x2a000000 0x87e0 0x2a000000 0x000 0x96000000>, /* PEMs */
248 <0x03000000 0x8400 0x00000000 0x8400 0x00000000 0x010 0x00000000>, /* RNM */
249 <0x03000000 0x8430 0x00000000 0x8430 0x00000000 0x02 0x00000000>, /* NIC0*/
250 <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>;
251
252 mrml_bridge: mrml-bridge0@1,0 {
253 compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge";
254 #size-cells = <2>;
255 #address-cells = <3>;
256 ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>;
257 reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */
258 device_type = "pci";
259 u-boot,dm-pre-reloc;
260
261 mdio-nexus@1,3 {
262 compatible = "cavium,thunder-8890-mdio-nexus";
263 #address-cells = <2>;
264 #size-cells = <2>;
265 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
266 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
267 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
268 mdio0@87e005003800 {
269 compatible = "cavium,thunder-8890-mdio";
270 #address-cells = <1>;
271 #size-cells = <0>;
272 reg = <0x87e0 0x05003800 0x0 0x30>;
273 };
274 mdio1@87e005003880 {
275 compatible = "cavium,thunder-8890-mdio";
276 #address-cells = <1>;
277 #size-cells = <0>;
278 reg = <0x87e0 0x05003880 0x0 0x30>;
279 };
280 };
281
282 mmc_1_4: mmc@1,4 {
283 compatible = "cavium,thunder-8890-mmc";
284 reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */
285 #address-cells = <1>;
286 #size-cells = <0>;
287 clocks = <&sclk>;
288 };
289
290 i2c_9_0: i2c@9,0 {
291 #address-cells = <1>;
292 #size-cells = <0>;
293 compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
294 reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */
295 clock-frequency = <100000>;
296 clocks = <&sclk>;
297 u-boot,dm-pre-reloc;
298 };
299
300 i2c_9_1: i2c@9,1 {
301 #address-cells = <1>;
302 #size-cells = <0>;
303 compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
304 reg = <0x4900 0 0 0 0>; /* DEVFN = 0x49 (9:1) */
305 clock-frequency = <100000>;
306 clocks = <&sclk>;
307 u-boot,dm-pre-reloc;
308 };
309
310 rgx0 {
311 #address-cells = <1>;
312 #size-cells = <0>;
313 reg = <0x9000 0 0 0 0>; /* DEVFN = 0x90 (16:1) */
314 };
315 bgx0 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */
319 };
320 bgx1 {
321 #address-cells = <1>;
322 #size-cells = <0>;
323 reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */
324 };
325 };
326
327 spi_7_0: spi@7,0 {
328 compatible = "cavium,thunder-8190-spi", "cavium,thunderx-spi";
329 reg = <0x3800 0x0 0x0 0x0 0x0>; /* DEVFN = 0x38 (7:0) */
330 #address-cells = <1>;
331 #size-cells = <0>;
332 clocks = <&sclk>;
333 };
334
335 gpio_6_0: gpio0@6,0 {
336 #gpio-cells = <2>;
337 compatible = "cavium,thunder-8890-gpio";
338 gpio-controller;
339 reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */
340 u-boot,dm-pre-reloc;
341 };
342
343 nfc: nand@b,0 {
344 #address-cells = <1>;
345 #size-cells = <0>;
346 compatible = "cavium,cn8130-nand";
347 reg = <0x5800 0 0 0 0>; /* DEVFN = 0x58 (b:0) */
348 clocks = <&sclk>;
349 };
350 };
351
352 pem0: pci@87e0c0000000 {
353
354 /* "cavium,pci-host-thunder-pem" implies that
355 the first bus in bus-range has config access
356 via the "PEM space", subsequent buses have
357 config assess via the "Configuration space".
358 The "mem64 PEM" range is used to map the PEM
359 BAR0, which is used by the AER and PME MSI-X
360 sources. UEFI and Linux must assign the same
361 bus number to each device, otherwise Linux
362 enumeration gets confused. Because UEFI
363 skips the PEM bus and its PCIe-RC bridge it
364 uses a numbering that starts 1 bus higher.
365 */
366
367 compatible = "cavium,pci-host-thunder-pem";
368 device_type = "pci";
369 msi-parent = <&its>;
370 msi-map = <0 &its 0 0x10000>;
371 bus-range = <0x1f 0x57>;
372 #size-cells = <2>;
373 #address-cells = <3>;
374 #stream-id-cells = <1>;
375 dma-coherent;
376 reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */
377 <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */
378 ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */
379 <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */
380 <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */
381 <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */
382
383 #interrupt-cells = <1>;
384 interrupt-map-mask = <0 0 0 7>;
385 interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */
386 <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */
387 <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */
388 <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */
389 };
390
391 pem1: pci@87e0c1000000 {
392 compatible = "cavium,pci-host-thunder-pem";
393 device_type = "pci";
394 msi-parent = <&its>;
395 msi-map = <0 &its 0 0x10000>;
396 bus-range = <0x57 0x8f>;
397 #size-cells = <2>;
398 #address-cells = <3>;
399 #stream-id-cells = <1>;
400 dma-coherent;
401 reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */
402 <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */
403 ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */
404 <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */
405 <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */
406 <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */
407
408 #interrupt-cells = <1>;
409 interrupt-map-mask = <0 0 0 7>;
410 interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */
411 <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */
412 <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */
413 <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */
414 };
415
416 pem2: pci@87e0c2000000 {
417 compatible = "cavium,pci-host-thunder-pem";
418 device_type = "pci";
419 msi-parent = <&its>;
420 msi-map = <0 &its 0 0x10000>;
421 bus-range = <0x8f 0xc7>;
422 #size-cells = <2>;
423 #address-cells = <3>;
424 #stream-id-cells = <1>;
425 dma-coherent;
426 reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */
427 <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */
428 ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */
429 <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */
430 <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
431 <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */
432
433 #interrupt-cells = <1>;
434 interrupt-map-mask = <0 0 0 7>;
435 interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */
436 <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */
437 <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */
438 <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */
439 };
440
441 tdm: tdm@d,0 {
442 #address-cells = <1>;
443 #size-cells = <0>;
444 compatible = "cavium,thunder-8190-tdm";
445 reg = <0x6800 0 0 0>; /* DEVFN = 0x68 (d:0) */
446 clocks = <&sclk>;
447 };
448 };
449
450 aliases {
451 serial0 = &uaa0;
452 serial1 = &uaa1;
453 i2c0 = &i2c_9_0;
454 i2c1 = &i2c_9_1;
455 spi0 = &spi_7_0;
456 };
457
458 chosen {
459 stdout-path = "serial0:115200n8";
460 };
461
462
463 memory@0 {
464 device_type = "memory";
465 reg = <0x0 0x01400000 0x0 0x7EC00000>;
466 /* socket 0 */
467 numa-node-id = <0>;
468 };
469};
diff --git a/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi
new file mode 100644
index 0000000..8cb10ec
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/cn83xx-linux.dtsi
@@ -0,0 +1,762 @@
1/*
2 * Cavium Thunder DTS file - Thunder SoC description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/ {
51 model = "Cavium ThunderX CN83XX board";
52 compatible = "cavium,thunder-83xx";
53 interrupt-parent = <&gic0>;
54 #address-cells = <2>;
55 #size-cells = <2>;
56
57 psci {
58 compatible = "arm,psci-0.2";
59 method = "smc";
60 };
61
62 cpus {
63 #address-cells = <2>;
64 #size-cells = <0>;
65
66 cpu-map {
67 cluster0 {
68 core0 {
69 cpu = <&CPU0>;
70 };
71 core1 {
72 cpu = <&CPU1>;
73 };
74 core2 {
75 cpu = <&CPU2>;
76 };
77 core3 {
78 cpu = <&CPU3>;
79 };
80 core4 {
81 cpu = <&CPU4>;
82 };
83 core5 {
84 cpu = <&CPU5>;
85 };
86 core6 {
87 cpu = <&CPU6>;
88 };
89 core7 {
90 cpu = <&CPU7>;
91 };
92 core8 {
93 cpu = <&CPU8>;
94 };
95 core9 {
96 cpu = <&CPU9>;
97 };
98 core10 {
99 cpu = <&CPU10>;
100 };
101 core11 {
102 cpu = <&CPU11>;
103 };
104 core12 {
105 cpu = <&CPU12>;
106 };
107 core13 {
108 cpu = <&CPU13>;
109 };
110 core14 {
111 cpu = <&CPU14>;
112 };
113 core15 {
114 cpu = <&CPU15>;
115 };
116 core16 {
117 cpu = <&CPU16>;
118 };
119 core17 {
120 cpu = <&CPU17>;
121 };
122 core18 {
123 cpu = <&CPU18>;
124 };
125 core19 {
126 cpu = <&CPU19>;
127 };
128 core20 {
129 cpu = <&CPU20>;
130 };
131 core21 {
132 cpu = <&CPU21>;
133 };
134 core22 {
135 cpu = <&CPU22>;
136 };
137 core23 {
138 cpu = <&CPU23>;
139 };
140 };
141 };
142
143 CPU0: cpu@0 {
144 device_type = "cpu";
145 compatible = "cavium,thunder", "arm,armv8";
146 reg = <0x0 0x000>;
147 enable-method = "psci";
148 /* socket 0 */
149 numa-node-id = <0>;
150 next-level-cache = <&thunderx_L2_0>;
151 };
152 CPU1: cpu@1 {
153 device_type = "cpu";
154 compatible = "cavium,thunder", "arm,armv8";
155 reg = <0x0 0x001>;
156 enable-method = "psci";
157 numa-node-id = <0>;
158 next-level-cache = <&thunderx_L2_0>;
159 };
160 CPU2: cpu@2 {
161 device_type = "cpu";
162 compatible = "cavium,thunder", "arm,armv8";
163 reg = <0x0 0x002>;
164 enable-method = "psci";
165 numa-node-id = <0>;
166 next-level-cache = <&thunderx_L2_0>;
167 };
168 CPU3: cpu@3 {
169 device_type = "cpu";
170 compatible = "cavium,thunder", "arm,armv8";
171 reg = <0x0 0x003>;
172 enable-method = "psci";
173 numa-node-id = <0>;
174 next-level-cache = <&thunderx_L2_0>;
175 };
176 CPU4: cpu@4 {
177 device_type = "cpu";
178 compatible = "cavium,thunder", "arm,armv8";
179 reg = <0x0 0x004>;
180 enable-method = "psci";
181 numa-node-id = <0>;
182 next-level-cache = <&thunderx_L2_0>;
183 };
184 CPU5: cpu@5 {
185 device_type = "cpu";
186 compatible = "cavium,thunder", "arm,armv8";
187 reg = <0x0 0x005>;
188 enable-method = "psci";
189 numa-node-id = <0>;
190 next-level-cache = <&thunderx_L2_0>;
191 };
192 CPU6: cpu@6 {
193 device_type = "cpu";
194 compatible = "cavium,thunder", "arm,armv8";
195 reg = <0x0 0x006>;
196 enable-method = "psci";
197 numa-node-id = <0>;
198 next-level-cache = <&thunderx_L2_0>;
199 };
200 CPU7: cpu@7 {
201 device_type = "cpu";
202 compatible = "cavium,thunder", "arm,armv8";
203 reg = <0x0 0x007>;
204 enable-method = "psci";
205 numa-node-id = <0>;
206 next-level-cache = <&thunderx_L2_0>;
207 };
208 CPU8: cpu@8 {
209 device_type = "cpu";
210 compatible = "cavium,thunder", "arm,armv8";
211 reg = <0x0 0x008>;
212 enable-method = "psci";
213 numa-node-id = <0>;
214 next-level-cache = <&thunderx_L2_0>;
215 };
216 CPU9: cpu@9 {
217 device_type = "cpu";
218 compatible = "cavium,thunder", "arm,armv8";
219 reg = <0x0 0x009>;
220 enable-method = "psci";
221 numa-node-id = <0>;
222 next-level-cache = <&thunderx_L2_0>;
223 };
224 CPU10: cpu@a {
225 device_type = "cpu";
226 compatible = "cavium,thunder", "arm,armv8";
227 reg = <0x0 0x00a>;
228 enable-method = "psci";
229 numa-node-id = <0>;
230 next-level-cache = <&thunderx_L2_0>;
231 };
232 CPU11: cpu@b {
233 device_type = "cpu";
234 compatible = "cavium,thunder", "arm,armv8";
235 reg = <0x0 0x00b>;
236 enable-method = "psci";
237 numa-node-id = <0>;
238 next-level-cache = <&thunderx_L2_0>;
239 };
240 CPU12: cpu@c {
241 device_type = "cpu";
242 compatible = "cavium,thunder", "arm,armv8";
243 reg = <0x0 0x00c>;
244 enable-method = "psci";
245 numa-node-id = <0>;
246 next-level-cache = <&thunderx_L2_0>;
247 };
248 CPU13: cpu@d {
249 device_type = "cpu";
250 compatible = "cavium,thunder", "arm,armv8";
251 reg = <0x0 0x00d>;
252 enable-method = "psci";
253 numa-node-id = <0>;
254 next-level-cache = <&thunderx_L2_0>;
255 };
256 CPU14: cpu@e {
257 device_type = "cpu";
258 compatible = "cavium,thunder", "arm,armv8";
259 reg = <0x0 0x00e>;
260 enable-method = "psci";
261 numa-node-id = <0>;
262 next-level-cache = <&thunderx_L2_0>;
263 };
264 CPU15: cpu@f {
265 device_type = "cpu";
266 compatible = "cavium,thunder", "arm,armv8";
267 reg = <0x0 0x00f>;
268 enable-method = "psci";
269 numa-node-id = <0>;
270 next-level-cache = <&thunderx_L2_0>;
271 };
272 CPU16: cpu@100 {
273 device_type = "cpu";
274 compatible = "cavium,thunder", "arm,armv8";
275 reg = <0x0 0x100>;
276 enable-method = "psci";
277 numa-node-id = <0>;
278 next-level-cache = <&thunderx_L2_0>;
279 };
280 CPU17: cpu@101 {
281 device_type = "cpu";
282 compatible = "cavium,thunder", "arm,armv8";
283 reg = <0x0 0x101>;
284 enable-method = "psci";
285 numa-node-id = <0>;
286 next-level-cache = <&thunderx_L2_0>;
287 };
288 CPU18: cpu@102 {
289 device_type = "cpu";
290 compatible = "cavium,thunder", "arm,armv8";
291 reg = <0x0 0x102>;
292 enable-method = "psci";
293 numa-node-id = <0>;
294 next-level-cache = <&thunderx_L2_0>;
295 };
296 CPU19: cpu@103 {
297 device_type = "cpu";
298 compatible = "cavium,thunder", "arm,armv8";
299 reg = <0x0 0x103>;
300 enable-method = "psci";
301 numa-node-id = <0>;
302 next-level-cache = <&thunderx_L2_0>;
303 };
304 CPU20: cpu@104 {
305 device_type = "cpu";
306 compatible = "cavium,thunder", "arm,armv8";
307 reg = <0x0 0x104>;
308 enable-method = "psci";
309 numa-node-id = <0>;
310 next-level-cache = <&thunderx_L2_0>;
311 };
312 CPU21: cpu@105 {
313 device_type = "cpu";
314 compatible = "cavium,thunder", "arm,armv8";
315 reg = <0x0 0x105>;
316 enable-method = "psci";
317 numa-node-id = <0>;
318 next-level-cache = <&thunderx_L2_0>;
319 };
320 CPU22: cpu@106 {
321 device_type = "cpu";
322 compatible = "cavium,thunder", "arm,armv8";
323 reg = <0x0 0x106>;
324 enable-method = "psci";
325 numa-node-id = <0>;
326 next-level-cache = <&thunderx_L2_0>;
327 };
328 CPU23: cpu@107 {
329 device_type = "cpu";
330 compatible = "cavium,thunder", "arm,armv8";
331 reg = <0x0 0x107>;
332 enable-method = "psci";
333 numa-node-id = <0>;
334 next-level-cache = <&thunderx_L2_0>;
335 };
336 };
337
338 thunderx_L2_0: l2-cache0 {
339 compatible = "cache";
340 numa-node-id = <0>;
341 };
342
343 timer {
344 compatible = "arm,armv8-timer";
345 interrupts = <1 13 4>,
346 <1 14 4>,
347 <1 11 4>,
348 <1 10 4>;
349 };
350
351 pmu {
352 compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
353 interrupts = <1 7 4>;
354 };
355
356 gic0: interrupt-controller@801000000000 {
357 compatible = "arm,gic-v3";
358 #interrupt-cells = <3>;
359 #address-cells = <2>;
360 #size-cells = <2>;
361 #redistributor-regions = <1>;
362 ranges;
363 interrupt-controller;
364 reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
365 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
366 interrupts = <1 9 4>;
367
368 its: gic-its@801000020000 {
369 compatible = "arm,gic-v3-its";
370 reg = <0x8010 0x20000 0x0 0x200000>;
371 msi-controller;
372 numa-node-id = <0>;
373 };
374 };
375
376 soc@0 {
377 compatible = "simple-bus";
378 #address-cells = <2>;
379 #size-cells = <2>;
380 ranges;
381 numa-node-id = <0>;
382
383 refclkuaa: refclkuaa {
384 compatible = "fixed-clock";
385 #clock-cells = <0>;
386 clock-frequency = <116640000>;
387 clock-output-names = "refclkuaa";
388 };
389
390 sclk: sclk {
391 compatible = "fixed-clock";
392 #clock-cells = <0>;
393 clock-frequency = <800000000>;
394 clock-output-names = "sclk";
395 };
396
397 uaa0: serial@87e028000000 {
398 compatible = "arm,pl011", "arm,primecell";
399 reg = <0x87e0 0x28000000 0x0 0x1000>;
400 interrupts = <0 5 4>;
401 clocks = <&refclkuaa>;
402 clock-names = "apb_pclk";
403 uboot,skip-init;
404 };
405
406 uaa1: serial@87e029000000 {
407 compatible = "arm,pl011", "arm,primecell";
408 reg = <0x87e0 0x29000000 0x0 0x1000>;
409 interrupts = <0 6 4>;
410 clocks = <&refclkuaa>;
411 clock-names = "apb_pclk";
412 uboot,skip-init;
413 };
414
415 watch-dog@8440000a0000 {
416 compatible = "arm,sbsa-gwdt";
417 reg = <0x8440 0xa0000 0x0 0x1000>, <0x8440 0xb0000 0x0 0x1000>;
418 interrupts = <0 9 4>;
419 };
420
421 smmu0@830000000000 {
422 compatible = "cavium,smmu-v2";
423 reg = <0x8300 0x0 0x0 0x2000000>;
424 #global-interrupts = <1>;
425 interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
426 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
427 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
428 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
429 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
430 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
431 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
432 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
433 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
434 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
435 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
436 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
437 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
438 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
439 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
440 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
441 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
442 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
443 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
444 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
445 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
446 <0 69 4>, <0 69 4>, <0 69 4>;
447
448 mmu-masters = <&ecam0 0x100>,
449 <&pem0 0x200>,
450 <&pem1 0x300>,
451 <&pem2 0x400>,
452 <&pem3 0x500>;
453
454 };
455
456 smmu1@831000000000 {
457 compatible = "cavium,smmu-v2";
458 reg = <0x8310 0x0 0x0 0x2000000>;
459 #global-interrupts = <1>;
460 interrupts = <0 70 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
461 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
462 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
463 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
464 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
465 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
466 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
467 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
468 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
469 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
470 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
471 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
472 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
473 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
474 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
475 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
476 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
477 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
478 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
479 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
480 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
481 <0 71 4>, <0 71 4>, <0 71 4>;
482
483 mmu-masters = <&ecam1 0x100>;
484 };
485
486
487 ecam0: pci@848000000000 {
488 compatible = "cavium,pci-host-octeontx-ecam";
489 device_type = "pci";
490 msi-parent = <&its>;
491 msi-map = <0 &its 0 0x10000>;
492 bus-range = <0x0 0xff>;
493 #size-cells = <2>;
494 #address-cells = <3>;
495 #stream-id-cells = <1>;
496 dma-coherent;
497 reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */
498 ranges = <0x03000000 0x8030 0x00000000 0x8030 0x00000000 0x050 0x00100000>, /* mem ranges */
499 <0x03000000 0x8280 0x00000000 0x8280 0x00000000 0x007 0x02000000>,
500 <0x03000000 0x8400 0x00800000 0x8400 0x00800000 0x00f 0xfc040000>,
501 <0x03000000 0x8580 0x00000000 0x8580 0x00000000 0x0a8 0x04000000>,
502 <0x03000000 0x86e0 0x00000000 0x86e0 0x00000000 0x100 0x28000000>,
503 <0x03000000 0x87e0 0x40000000 0x87e0 0x40000000 0x000 0x6c800000>,
504 <0x03000000 0x87e0 0xd0000000 0x87e0 0xd0000000 0x010 0xaf100000>,
505 <0x03000000 0x0000 0x01400000 0x0000 0x01400000 0x000 0x00A00000>; /* SSO mailbox */
506
507
508 mrml_bridge: mrml-bridge0@1,0 {
509 compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge";
510 #size-cells = <2>;
511 #address-cells = <3>;
512 ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>;
513 reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */
514 device_type = "pci";
515 u-boot,dm-pre-reloc;
516
517 mdio-nexus@1,3 {
518 compatible = "cavium,thunder-8890-mdio-nexus";
519 #address-cells = <2>;
520 #size-cells = <2>;
521 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
522 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
523 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
524
525 mdio0@87e005003800 {
526 compatible = "cavium,thunder-8890-mdio";
527 #address-cells = <1>;
528 #size-cells = <0>;
529 reg = <0x87e0 0x05003800 0x0 0x30>;
530
531 };
532
533 mdio1@87e005003880 {
534 compatible = "cavium,thunder-8890-mdio";
535 #address-cells = <1>;
536 #size-cells = <0>;
537 reg = <0x87e0 0x05003880 0x0 0x30>;
538
539
540 };
541 };
542
543 mmc_1_4: mmc@1,4 {
544 compatible = "cavium,thunder-8890-mmc";
545 reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */
546 #address-cells = <1>;
547 #size-cells = <0>;
548 clocks = <&sclk>;
549 };
550
551 i2c_9_0: i2c@9,0 {
552 #address-cells = <1>;
553 #size-cells = <0>;
554 compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
555 reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */
556 clock-frequency = <100000>;
557 clocks = <&sclk>;
558 u-boot,dm-pre-reloc;
559 };
560
561 i2c_9_1: i2c@9,1 {
562 #address-cells = <1>;
563 #size-cells = <0>;
564 compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
565 reg = <0x4900 0 0 0 0>; /* DEVFN = 0x49 (9:1) */
566 clock-frequency = <100000>;
567 clocks = <&sclk>;
568 u-boot,dm-pre-reloc;
569 };
570
571 bgx0 {
572 #address-cells = <1>;
573 #size-cells = <0>;
574 reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */
575 };
576 bgx1 {
577 #address-cells = <1>;
578 #size-cells = <0>;
579 reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */
580 };
581
582 bgx2 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 reg = <0x8200 0 0 0 0>; /* DEVFN = 0x82 (16:0) */
586 };
587
588 bgx3 {
589 #address-cells = <1>;
590 #size-cells = <0>;
591 reg = <0x8300 0 0 0 0>; /* DEVFN = 0x83 (16:0) */
592 };
593 };
594
595 spi_7_0: spi@7,0 {
596 compatible = "cavium,thunder-8190-spi", "cavium,thunderx-spi";
597 reg = <0x3800 0x0 0x0 0x0 0x0>; /* DEVFN = 0x38 (7:0) */
598 #address-cells = <1>;
599 #size-cells = <0>;
600 clocks = <&sclk>;
601 };
602
603 gpio_6_0: gpio0@6,0 {
604 #gpio-cells = <2>;
605 compatible = "cavium,thunder-8890-gpio";
606 gpio-controller;
607 reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */
608 u-boot,dm-pre-reloc;
609 };
610 };
611
612 ecam1: pci@849000000000 {
613 compatible = "cavium,pci-host-octeontx-ecam";
614 device_type = "pci";
615 msi-parent = <&its>;
616 msi-map = <0 &its 0x10000 0x10000>;
617 bus-range = <0x0 0xff>;
618 #size-cells = <2>;
619 #address-cells = <3>;
620 #stream-id-cells = <1>;
621 dma-coherent;
622 reg = <0x8490 0x00000000 0 0x10000000>; /* Configuration space */
623 ranges = <0x03000000 0x8090 0x00000000 0x8090 0x00000000 0x0c0 0x00300000>, /* mem ranges */
624 <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x000 0x30800000>,
625 <0x03000000 0x8430 0x00000000 0x8430 0x00000000 0x000 0xf0000000>,
626 <0x03000000 0x8540 0x00000000 0x8540 0x00000000 0x004 0x02000000>,
627 <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x040 0x02000000>,
628 <0x03000000 0x87f1 0x80000000 0x87f1 0x80000000 0x000 0x80000000>, /* LMTLINE */
629 <0x03000000 0x0000 0x01E00000 0x0000 0x01E00000 0x000 0x00A00000>; /* PKI emulated VF space */
630 };
631
632 pem0: pci@87e0c0000000 {
633
634 /* "cavium,pci-host-thunder-pem" implies that
635 the first bus in bus-range has config access
636 via the "PEM space", subsequent buses have
637 config assess via the "Configuration space".
638 The "mem64 PEM" range is used to map the PEM
639 BAR0, which is used by the AER and PME MSI-X
640 sources. UEFI and Linux must assign the same
641 bus number to each device, otherwise Linux
642 enumeration gets confused. Because UEFI
643 skips the PEM bus and its PCIe-RC bridge it
644 uses a numbering that starts 1 bus higher.
645 */
646
647 compatible = "cavium,pci-host-thunder-pem";
648 device_type = "pci";
649 msi-parent = <&its>;
650 msi-map = <0 &its 0 0x10000>;
651 bus-range = <0x1f 0x57>;
652 #size-cells = <2>;
653 #address-cells = <3>;
654 #stream-id-cells = <1>;
655 dma-coherent;
656 reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */
657 <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */
658 ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */
659 <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */
660 <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */
661 <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */
662
663 #interrupt-cells = <1>;
664 interrupt-map-mask = <0 0 0 7>;
665 interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */
666 <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */
667 <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */
668 <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */
669 };
670
671 pem1: pci@87e0c1000000 {
672 compatible = "cavium,pci-host-thunder-pem";
673 device_type = "pci";
674 msi-parent = <&its>;
675 msi-map = <0 &its 0 0x10000>;
676 bus-range = <0x57 0x8f>;
677 #size-cells = <2>;
678 #address-cells = <3>;
679 #stream-id-cells = <1>;
680 dma-coherent;
681 reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */
682 <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */
683 ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */
684 <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */
685 <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */
686 <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */
687
688 #interrupt-cells = <1>;
689 interrupt-map-mask = <0 0 0 7>;
690 interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */
691 <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */
692 <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */
693 <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */
694 };
695
696 pem2: pci@87e0c2000000 {
697 compatible = "cavium,pci-host-thunder-pem";
698 device_type = "pci";
699 msi-parent = <&its>;
700 msi-map = <0 &its 0 0x10000>;
701 bus-range = <0x8f 0xc7>;
702 #size-cells = <2>;
703 #address-cells = <3>;
704 #stream-id-cells = <1>;
705 dma-coherent;
706 reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */
707 <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */
708 ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */
709 <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */
710 <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
711 <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */
712
713 #interrupt-cells = <1>;
714 interrupt-map-mask = <0 0 0 7>;
715 interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */
716 <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */
717 <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */
718 <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */
719 };
720
721 pem3: pci@87e0c3000000 {
722 compatible = "cavium,pci-host-thunder-pem";
723 device_type = "pci";
724 msi-parent = <&its>;
725 msi-map = <0 &its 0 0x10000>;
726 bus-range = <0xc7 0xff>;
727 #size-cells = <2>;
728 #address-cells = <3>;
729 #stream-id-cells = <1>;
730 dma-coherent;
731 reg = <0x88c0 0xc7000000 0x0 0x39000000>, /* Configuration space */
732 <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */
733 ranges = <0x01000000 0x00 0x00030000 0x88f0 0x00030000 0x00 0x00010000>, /* I/O */
734 <0x03000000 0x00 0x10000000 0x88d0 0x10000000 0x0f 0xf0000000>, /* mem64 */
735 <0x43000000 0x10 0x00000000 0x88e0 0x00000000 0x10 0x00000000>, /* mem64-pref */
736 <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */
737
738 #interrupt-cells = <1>;
739 interrupt-map-mask = <0 0 0 7>;
740 interrupt-map = <0 0 0 1 &gic0 0 0 0 28 4>, /* INTA */
741 <0 0 0 2 &gic0 0 0 0 29 4>, /* INTB */
742 <0 0 0 3 &gic0 0 0 0 30 4>, /* INTC */
743 <0 0 0 4 &gic0 0 0 0 31 4>; /* INTD */
744 };
745 };
746
747 aliases {
748 serial0 = &uaa0;
749 serial1 = &uaa1;
750 };
751
752 chosen {
753 stdout-path = &uaa0;
754 };
755
756 memory@00000000 {
757 device_type = "memory";
758 reg = <0x0 0x02800000 0x0 0x7EC00000>;
759 /* socket 0 */
760 numa-node-id = <0>;
761 };
762};
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts
new file mode 100644
index 0000000..cc80f31
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8004-linux.dts
@@ -0,0 +1,488 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 rgmii00: rgmii00 {
58 reg = <3> ;
59 compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22";
60 };
61 };
62
63 mdio1@87e005003880 {
64 sgmii00: sgmii00 {
65 qlm-mode = "0x000,sgmii";
66 reg = <0> ;
67 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
68 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii01: sgmii01 {
75 qlm-mode = "0x001,sgmii";
76 reg = <2> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 xfi00: xfi00 {
84 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
85 reg = <0> ;
86 compatible = "cortina,cs4223-slice";
87 };
88 xfi01: xfi01 {
89 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
90 reg = <2> ;
91 compatible = "cortina,cs4223-slice";
92 };
93 qsgmii00: qsgmii00 {
94 qlm-mode = "0x000,qsgmii";
95 reg = <0> ;
96 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
97 };
98 qsgmii01: qsgmii01 {
99 qlm-mode = "0x001,qsgmii";
100 reg = <1> ;
101 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
102 };
103 qsgmii02: qsgmii02 {
104 qlm-mode = "0x002,qsgmii";
105 reg = <2> ;
106 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
107 };
108 qsgmii03: qsgmii03 {
109 qlm-mode = "0x003,qsgmii";
110 reg = <3> ;
111 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
112 };
113
114 sgmii10: sgmii10 {
115 qlm-mode = "0x010,sgmii";
116 reg = <8> ;
117 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
118 marvell,reg-init = <3 0x10 0 0x8665>,
119 <3 0x11 0 0x00aa>,
120 <3 0x12 0 0x4105>,
121 <3 0x13 0 0x8a08>;
122 };
123 sgmii11: sgmii11 {
124 qlm-mode = "0x011,sgmii";
125 reg = <9> ;
126 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
127 marvell,reg-init = <3 0x10 0 0x8665>,
128 <3 0x11 0 0x00aa>,
129 <3 0x12 0 0x4105>,
130 <3 0x13 0 0x8a08>;
131 };
132 sgmii12: sgmii12 {
133 qlm-mode = "0x012,sgmii";
134 reg = <10> ;
135 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
136 marvell,reg-init = <3 0x10 0 0x8665>,
137 <3 0x11 0 0x00aa>,
138 <3 0x12 0 0x4105>,
139 <3 0x13 0 0x8a08>;
140 };
141 sgmii13: sgmii13 {
142 qlm-mode = "0x013,sgmii";
143 reg = <11> ;
144 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
145 marvell,reg-init = <3 0x10 0 0x8665>,
146 <3 0x11 0 0x00aa>,
147 <3 0x12 0 0x4105>,
148 <3 0x13 0 0x8a08>;
149 };
150 xfi10: xfi10 {
151 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
152 reg = <8> ;
153 compatible = "cortina,cs4223-slice";
154 };
155 xfi11: xfi11 {
156 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
157 reg = <9> ;
158 compatible = "cortina,cs4223-slice";
159 };
160 xfi12: xfi12 {
161 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
162 reg = <10> ;
163 compatible = "cortina,cs4223-slice";
164 };
165 xfi13: xfi13 {
166 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
167 reg = <11> ;
168 compatible = "cortina,cs4223-slice";
169 };
170 xlaui10: xlaui10 {
171 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
172 reg = <8> ;
173 compatible = "cortina,cs4223-slice";
174 };
175 xaui10: xaui10 {
176 qlm-mode = "0x010,xaui";
177 reg = <8> ;
178 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
179 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
180 };
181 rxaui10: rxaui10 {
182 qlm-mode = "0x010,rxaui";
183 reg = <8> ;
184 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
185 };
186 rxaui11: rxaui11 {
187 qlm-mode = "0x011,rxaui";
188 reg = <10> ;
189 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
190 };
191 qsgmii10: qsgmii10 {
192 qlm-mode = "0x010,qsgmii";
193 reg = <8> ;
194 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
195 };
196 qsgmii11: qsgmii11 {
197 qlm-mode = "0x011,qsgmii";
198 reg = <9> ;
199 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
200 };
201 qsgmii12: qsgmii12 {
202 qlm-mode = "0x012,qsgmii";
203 reg = <10> ;
204 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
205 };
206 qsgmii13: qsgmii13 {
207 qlm-mode = "0x013,qsgmii";
208 reg = <11> ;
209 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
210 };
211 };
212 };
213
214 rgx0 {
215 rgmii00 {
216 reg = <3>;
217 local-mac-address = [00 00 00 00 00 00];
218 phy-handle = <&rgmii00>;
219 };
220 };
221
222 bgx0 {
223 /* typename+qlm+typenumber eg :
224 sgmii+bgx0+sgmmi0
225 */
226 // SGMII
227 sgmii00 {
228 reg = <0>;
229 qlm-mode = "0x000,sgmii";
230 local-mac-address = [00 00 00 00 00 00];
231 phy-handle = <&sgmii00>;
232 };
233 sgmii01 {
234 reg = <1>;
235 qlm-mode = "0x001,sgmii";
236 local-mac-address = [00 00 00 00 00 00];
237 phy-handle = <&sgmii01>;
238 };
239 xfi00 {
240 reg = <0>;
241 qlm-mode = "0x000,xfi";
242 local-mac-address = [00 00 00 00 00 00];
243 phy-handle = <&xfi00>;
244 };
245 xfi01 {
246 reg = <1>;
247 qlm-mode = "0x001,xfi";
248 local-mac-address = [00 00 00 00 00 00];
249 phy-handle = <&xfi01>;
250 };
251 // 10g-kr
252 xfi-10g-kr00 {
253 reg = <0>;
254 qlm-mode = "0x000,xfi-10g-kr";
255 local-mac-address = [00 00 00 00 00 00];
256 phy-handle = <&xfi00>;
257 };
258 xfi-10g-kr01 {
259 reg = <1>;
260 qlm-mode = "0x001,xfi-10g-kr";
261 local-mac-address = [00 00 00 00 00 00];
262 phy-handle = <&xfi01>;
263 };
264 qsgmii00 {
265 reg = <0>;
266 qlm-mode = "0x000,qsgmii";
267 local-mac-address = [00 00 00 00 00 00];
268 phy-handle = <&qsgmii00>;
269 };
270 qsgmii01 {
271 reg = <1>;
272 qlm-mode = "0x001,qsgmii";
273 local-mac-address = [00 00 00 00 00 00];
274 phy-handle = <&qsgmii01>;
275 };
276 qsgmii02 {
277 reg = <2>;
278 qlm-mode = "0x002,qsgmii";
279 local-mac-address = [00 00 00 00 00 00];
280 phy-handle = <&qsgmii02>;
281 };
282 qsgmii03 {
283 reg = <3>;
284 qlm-mode = "0x003,qsgmii";
285 local-mac-address = [00 00 00 00 00 00];
286 phy-handle = <&qsgmii03>;
287 };
288 };
289 bgx1 {
290 sgmii10 {
291 reg = <0>;
292 qlm-mode = "0x010,sgmii";
293 local-mac-address = [00 00 00 00 00 00];
294 phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */
295 };
296 sgmii11 {
297 reg = <1>;
298 qlm-mode = "0x011,sgmii";
299 local-mac-address = [00 00 00 00 00 00];
300 phy-handle = <&sgmii11>;
301 };
302 sgmii12 {
303 reg = <2>;
304 qlm-mode = "0x012,sgmii";
305 local-mac-address = [00 00 00 00 00 00];
306 phy-handle = <&sgmii12>;
307 };
308 sgmii13 {
309 reg = <3>;
310 qlm-mode = "0x013,sgmii";
311 local-mac-address = [00 00 00 00 00 00];
312 phy-handle = <&sgmii13>;
313 };
314 xfi10 {
315 reg = <0>;
316 qlm-mode = "0x010,xfi";
317 local-mac-address = [00 00 00 00 00 00];
318 phy-handle = <&xfi10>;
319 };
320 xfi11 {
321 reg = <1>;
322 qlm-mode = "0x011,xfi";
323 local-mac-address = [00 00 00 00 00 00];
324 phy-handle = <&xfi11>;
325 };
326 xfi12 {
327 reg = <2>;
328 qlm-mode = "0x012,xfi";
329 local-mac-address = [00 00 00 00 00 00];
330 phy-handle = <&xfi12>;
331 };
332 xfi13 {
333 reg = <3>;
334 qlm-mode = "0x013,xfi";
335 local-mac-address = [00 00 00 00 00 00];
336 phy-handle = <&xfi13>;
337 };
338 // 10g_kr
339 xfi-10g-kr10 {
340 reg = <0>;
341 qlm-mode = "0x010,xfi-10g-kr";
342 local-mac-address = [00 00 00 00 00 00];
343 phy-handle = <&xfi10>;
344 };
345 xfi-10g-kr11 {
346 reg = <1>;
347 qlm-mode = "0x011,xfi-10g-kr";
348 local-mac-address = [00 00 00 00 00 00];
349 phy-handle = <&xfi11>;
350 };
351 xfi-10g-kr12 {
352 reg = <2>;
353 qlm-mode = "0x012,xfi-10g-kr";
354 local-mac-address = [00 00 00 00 00 00];
355 phy-handle = <&xfi12>;
356 };
357 xfi-10g-kr13 {
358 reg = <3>;
359 qlm-mode = "0x013,xfi-10g-kr";
360 local-mac-address = [00 00 00 00 00 00];
361 phy-handle = <&xfi13>;
362 };
363 xlaui10 {
364 reg = <0>;
365 qlm-mode = "0x010,xlaui";
366 local-mac-address = [00 00 00 00 00 00];
367 phy-handle = <&xlaui10>;
368 };
369 xlaui-40g-kr-10 {
370 reg = <0>;
371 qlm-mode = "0x010,xlaui-40g-kr";
372 local-mac-address = [00 00 00 00 00 00];
373 phy-handle = <&xlaui10>;
374 };
375 xaui10 {
376 reg = <0>;
377 qlm-mode = "0x010,xaui";
378 local-mac-address = [00 00 00 00 00 00];
379 phy-handle = <&xaui10>;
380 };
381 rxaui10 {
382 reg = <8>;
383 qlm-mode = "0x010,rxaui";
384 local-mac-address = [00 00 00 00 00 00];
385 phy-handle = <&rxaui10>;
386 };
387 rxaui11 {
388 reg = <9>;
389 qlm-mode = "0x011,rxaui";
390 local-mac-address = [00 00 00 00 00 00];
391 phy-handle = <&rxaui11>;
392 };
393 qsgmii10 {
394 reg = <0>;
395 qlm-mode = "0x010,qsgmii";
396 local-mac-address = [00 00 00 00 00 00];
397 phy-handle = <&qsgmii10>;
398 };
399 qsgmii11 {
400 reg = <1>;
401 qlm-mode = "0x011,qsgmii";
402 local-mac-address = [00 00 00 00 00 00];
403 phy-handle = <&qsgmii11>;
404 };
405 qsgmii12 {
406 reg = <2>;
407 qlm-mode = "0x012,qsgmii";
408 local-mac-address = [00 00 00 00 00 00];
409 phy-handle = <&qsgmii12>;
410 };
411 qsgmii13 {
412 reg = <3>;
413 qlm-mode = "0x013,qsgmii";
414 local-mac-address = [00 00 00 00 00 00];
415 phy-handle = <&qsgmii13>;
416 };
417 };
418};
419
420&mmc_1_4 {
421 /* Power on GPIO 8, active high, shared */
422 power-gpios = <&gpio_6_0 8 0>;
423
424 mmc-slot@0 {
425 compatible = "cavium,thunder-8890-mmc-slot";
426 reg = <0>;
427 /* Only 3.3v is supported */
428 voltage-ranges = <3300 3300>;
429 max-frequency = <26000000>;
430 /* 1.8v is not supported */
431 no-1-8-v;
432 /* Bus width is only 8 bits maximum */
433 bus-width = <8>;
434 /* Write-protect */
435 wp-gpios = <&gpio_6_0 26 0>;
436 /* Card detect */
437 cd-gpios = <&gpio_6_0 27 1>;
438
439 /* SD UHS SDR25 is supported */
440 sd-uhs-sdr25;
441 /* High-speed mode is supported */
442 cap-sd-highspeed;
443 cap-mmc-highspeed;
444 };
445 mmc-slot@1 {
446 compatible = "cavium,thunder-8890-mmc-slot";
447 reg = <1>;
448 /* Only 3.3v is supported */
449 voltage-ranges = <3300 3300>;
450 max-frequency = <26000000>;
451 /* 1.8v is not supported */
452 no-1-8-v;
453 /* Bus width is only 8 bits maximum */
454 bus-width = <8>;
455 /* Write-protect */
456 wp-gpios = <&gpio_6_0 24 0>;
457 /* Card detect */
458 cd-gpios = <&gpio_6_0 25 1>;
459 /* SD UHS SDR25 is supported */
460 sd-uhs-sdr25;
461 /* High-speed mode is supported */
462 cap-sd-highspeed;
463 cap-mmc-highspeed;
464 };
465};
466
467&i2c_9_0 {
468 rtc@68 {
469 compatible = "dallas,ds1337";
470 reg = <0x68>;
471 };
472 gpio1: cpld@6c {
473 compatible = "gpio-i2c", "cavium,cpld8104";
474 reg = <0x6c>;
475 gpio_base = <48>;
476 #gpio-cells = <160>; // 8bits for each reg 0..0x13
477 };
478};
479
480&spi_7_0 {
481 flash@0 {
482 compatible = "jedec,spi-nor";
483 reg = <0x0>;
484 spi-max-frequency = <16000000>;
485 #address-cells = <1>;
486 #size-cells = <1>;
487 };
488};
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts
new file mode 100644
index 0000000..e39bded
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8104-linux.dts
@@ -0,0 +1,623 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 rgmii00: rgmii00 {
58 reg = <3> ;
59 compatible = "micrel,ksz9031", "ethernet-phy-ieee802.3-c22";
60 };
61 };
62
63 mdio1@87e005003880 {
64 sgmii00: sgmii00 {
65 qlm-mode = "0x000,sgmii";
66 reg = <0> ;
67 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
68 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii01: sgmii01 {
75 qlm-mode = "0x001,sgmii";
76 reg = <1> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 sgmii02: sgmii02 {
84 qlm-mode = "0x002,sgmii";
85 reg = <2> ;
86 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
87 marvell,reg-init = <3 0x10 0 0x8665>,
88 <3 0x11 0 0x00aa>,
89 <3 0x12 0 0x4105>,
90 <3 0x13 0 0x8a08>;
91 };
92 sgmii03: sgmii03 {
93 qlm-mode = "0x003,sgmii";
94 reg = <3> ;
95 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
96 marvell,reg-init = <3 0x10 0 0x8665>,
97 <3 0x11 0 0x00aa>,
98 <3 0x12 0 0x4105>,
99 <3 0x13 0 0x8a08>;
100 };
101 xfi00: xfi00 {
102 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
103 reg = <0> ;
104 compatible = "cortina,cs4223-slice";
105 };
106 xfi01: xfi01 {
107 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
108 reg = <1> ;
109 compatible = "cortina,cs4223-slice";
110 };
111 xfi02: xfi02 {
112 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
113 reg = <2> ;
114 compatible = "cortina,cs4223-slice";
115 };
116 xfi03: xfi03 {
117 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
118 reg = <3> ;
119 compatible = "cortina,cs4223-slice";
120 };
121 xlaui00: xlaui00 {
122 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
123 reg = <0> ;
124 compatible = "cortina,cs4223-slice";
125 };
126 xaui00: xaui00 {
127 qlm-mode = "0x000,xaui";
128 reg = <0> ;
129 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
130 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
131 };
132 rxaui00: rxaui00 {
133 qlm-mode = "0x000,rxaui";
134 reg = <0> ;
135 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
136 };
137 rxaui01: rxaui01 {
138 qlm-mode = "0x001,rxaui";
139 reg = <1> ;
140 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
141 };
142 qsgmii00: qsgmii00 {
143 qlm-mode = "0x000,qsgmii";
144 reg = <0> ;
145 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
146 };
147 qsgmii01: qsgmii01 {
148 qlm-mode = "0x001,qsgmii";
149 reg = <1> ;
150 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
151 };
152 qsgmii02: qsgmii02 {
153 qlm-mode = "0x002,qsgmii";
154 reg = <2> ;
155 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
156 };
157 qsgmii03: qsgmii03 {
158 qlm-mode = "0x003,qsgmii";
159 reg = <3> ;
160 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
161 };
162
163 sgmii10: sgmii10 {
164 qlm-mode = "0x010,sgmii";
165 reg = <8> ;
166 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
167 marvell,reg-init = <3 0x10 0 0x8665>,
168 <3 0x11 0 0x00aa>,
169 <3 0x12 0 0x4105>,
170 <3 0x13 0 0x8a08>;
171 };
172 sgmii11: sgmii11 {
173 qlm-mode = "0x011,sgmii";
174 reg = <9> ;
175 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
176 marvell,reg-init = <3 0x10 0 0x8665>,
177 <3 0x11 0 0x00aa>,
178 <3 0x12 0 0x4105>,
179 <3 0x13 0 0x8a08>;
180 };
181 sgmii12: sgmii12 {
182 qlm-mode = "0x012,sgmii";
183 reg = <10> ;
184 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
185 marvell,reg-init = <3 0x10 0 0x8665>,
186 <3 0x11 0 0x00aa>,
187 <3 0x12 0 0x4105>,
188 <3 0x13 0 0x8a08>;
189 };
190 sgmii13: sgmii13 {
191 qlm-mode = "0x013,sgmii";
192 reg = <11> ;
193 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
194 marvell,reg-init = <3 0x10 0 0x8665>,
195 <3 0x11 0 0x00aa>,
196 <3 0x12 0 0x4105>,
197 <3 0x13 0 0x8a08>;
198 };
199 xfi10: xfi10 {
200 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
201 reg = <8> ;
202 compatible = "cortina,cs4223-slice";
203 };
204 xfi11: xfi11 {
205 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
206 reg = <9> ;
207 compatible = "cortina,cs4223-slice";
208 };
209 xfi12: xfi12 {
210 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
211 reg = <10> ;
212 compatible = "cortina,cs4223-slice";
213 };
214 xfi13: xfi13 {
215 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
216 reg = <11> ;
217 compatible = "cortina,cs4223-slice";
218 };
219 xlaui10: xlaui10 {
220 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
221 reg = <8> ;
222 compatible = "cortina,cs4223-slice";
223 };
224 xaui10: xaui10 {
225 qlm-mode = "0x010,xaui";
226 reg = <8> ;
227 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
228 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
229 };
230 rxaui10: rxaui10 {
231 qlm-mode = "0x010,rxaui";
232 reg = <8> ;
233 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
234 };
235 rxaui11: rxaui11 {
236 qlm-mode = "0x011,rxaui";
237 reg = <9> ;
238 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
239 };
240 qsgmii10: qsgmii10 {
241 qlm-mode = "0x010,qsgmii";
242 reg = <8> ;
243 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
244 };
245 qsgmii11: qsgmii11 {
246 qlm-mode = "0x011,qsgmii";
247 reg = <9> ;
248 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
249 };
250 qsgmii12: qsgmii12 {
251 qlm-mode = "0x012,qsgmii";
252 reg = <10> ;
253 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
254 };
255 qsgmii13: qsgmii13 {
256 qlm-mode = "0x013,qsgmii";
257 reg = <11> ;
258 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
259 };
260 };
261 };
262
263 rgx0 {
264 rgmii00 {
265 reg = <3>;
266 local-mac-address = [00 00 00 00 00 00];
267 phy-handle = <&rgmii00>;
268 };
269 };
270
271 bgx0 {
272 /* typename+qlm+typenumber eg :
273 sgmii+bgx0+sgmmi0
274 */
275 // SGMII
276 sgmii00 {
277 reg = <0>;
278 qlm-mode = "0x000,sgmii";
279 local-mac-address = [00 00 00 00 00 00];
280 phy-handle = <&sgmii00>;
281 };
282 sgmii01 {
283 reg = <1>;
284 qlm-mode = "0x001,sgmii";
285 local-mac-address = [00 00 00 00 00 00];
286 phy-handle = <&sgmii01>;
287 };
288 sgmii02 {
289 reg = <2>;
290 qlm-mode = "0x002,sgmii";
291 local-mac-address = [00 00 00 00 00 00];
292 phy-handle = <&sgmii02>;
293 };
294 sgmii03 {
295 reg = <3>;
296 qlm-mode = "0x003,sgmii";
297 local-mac-address = [00 00 00 00 00 00];
298 phy-handle = <&sgmii03>;
299 };
300 xfi00 {
301 reg = <0>;
302 qlm-mode = "0x000,xfi";
303 local-mac-address = [00 00 00 00 00 00];
304 phy-handle = <&xfi00>;
305 };
306 xfi01 {
307 reg = <1>;
308 qlm-mode = "0x001,xfi";
309 local-mac-address = [00 00 00 00 00 00];
310 phy-handle = <&xfi01>;
311 };
312 xfi02 {
313 reg = <2>;
314 qlm-mode = "0x002,xfi";
315 local-mac-address = [00 00 00 00 00 00];
316 phy-handle = <&xfi02>;
317 };
318 xfi03 {
319 reg = <3>;
320 qlm-mode = "0x003,xfi";
321 local-mac-address = [00 00 00 00 00 00];
322 phy-handle = <&xfi03>;
323 };
324 // 10g-kr
325 xfi-10g-kr00 {
326 reg = <0>;
327 qlm-mode = "0x000,xfi-10g-kr";
328 local-mac-address = [00 00 00 00 00 00];
329 phy-handle = <&xfi00>;
330 };
331 xfi-10g-kr01 {
332 reg = <1>;
333 qlm-mode = "0x001,xfi-10g-kr";
334 local-mac-address = [00 00 00 00 00 00];
335 phy-handle = <&xfi01>;
336 };
337 xfi-10g-kr02 {
338 reg = <2>;
339 qlm-mode = "0x002,xfi-10g-kr";
340 local-mac-address = [00 00 00 00 00 00];
341 phy-handle = <&xfi02>;
342 };
343 xfi-10g-kr03 {
344 reg = <3>;
345 qlm-mode = "0x003,xfi-10g-kr";
346 local-mac-address = [00 00 00 00 00 00];
347 phy-handle = <&xfi03>;
348 };
349 xlaui00 {
350 reg = <0>;
351 qlm-mode = "0x000,xlaui";
352 local-mac-address = [00 00 00 00 00 00];
353 phy-handle = <&xlaui00>;
354 };
355 xlaui-40g-kr00 {
356 reg = <0>;
357 qlm-mode = "0x000,xlaui-40g-kr";
358 local-mac-address = [00 00 00 00 00 00];
359 phy-handle = <&xlaui00>;
360 };
361 xaui00 {
362 reg = <0>;
363 qlm-mode = "0x000,xaui";
364 local-mac-address = [00 00 00 00 00 00];
365 phy-handle = <&xaui00>;
366 };
367 rxaui00 {
368 reg = <0>;
369 qlm-mode = "0x000,rxaui";
370 local-mac-address = [00 00 00 00 00 00];
371 phy-handle = <&rxaui00>;
372 };
373 rxaui01 {
374 reg = <1>;
375 qlm-mode = "0x001,rxaui";
376 local-mac-address = [00 00 00 00 00 00];
377 phy-handle = <&rxaui01>;
378 };
379 qsgmii00 {
380 reg = <0>;
381 qlm-mode = "0x000,qsgmii";
382 local-mac-address = [00 00 00 00 00 00];
383 phy-handle = <&qsgmii00>;
384 };
385 qsgmii01 {
386 reg = <1>;
387 qlm-mode = "0x001,qsgmii";
388 local-mac-address = [00 00 00 00 00 00];
389 phy-handle = <&qsgmii01>;
390 };
391 qsgmii02 {
392 reg = <2>;
393 qlm-mode = "0x002,qsgmii";
394 local-mac-address = [00 00 00 00 00 00];
395 phy-handle = <&qsgmii02>;
396 };
397 qsgmii03 {
398 reg = <3>;
399 qlm-mode = "0x003,qsgmii";
400 local-mac-address = [00 00 00 00 00 00];
401 phy-handle = <&qsgmii03>;
402 };
403 };
404 bgx1 {
405 sgmii10 {
406 reg = <0>;
407 qlm-mode = "0x010,sgmii";
408 local-mac-address = [00 00 00 00 00 00];
409 phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */
410 };
411 sgmii11 {
412 reg = <1>;
413 qlm-mode = "0x011,sgmii";
414 local-mac-address = [00 00 00 00 00 00];
415 phy-handle = <&sgmii11>;
416 };
417 sgmii12 {
418 reg = <2>;
419 qlm-mode = "0x012,sgmii";
420 local-mac-address = [00 00 00 00 00 00];
421 phy-handle = <&sgmii12>;
422 };
423 sgmii13 {
424 reg = <3>;
425 qlm-mode = "0x013,sgmii";
426 local-mac-address = [00 00 00 00 00 00];
427 phy-handle = <&sgmii13>;
428 };
429 xfi10 {
430 reg = <0>;
431 qlm-mode = "0x010,xfi";
432 local-mac-address = [00 00 00 00 00 00];
433 phy-handle = <&xfi10>;
434 };
435 xfi11 {
436 reg = <1>;
437 qlm-mode = "0x011,xfi";
438 local-mac-address = [00 00 00 00 00 00];
439 phy-handle = <&xfi11>;
440 };
441 xfi12 {
442 reg = <2>;
443 qlm-mode = "0x012,xfi";
444 local-mac-address = [00 00 00 00 00 00];
445 phy-handle = <&xfi12>;
446 };
447 xfi13 {
448 reg = <3>;
449 qlm-mode = "0x013,xfi";
450 local-mac-address = [00 00 00 00 00 00];
451 phy-handle = <&xfi13>;
452 };
453 // 10g_kr
454 xfi-10g-kr10 {
455 reg = <0>;
456 qlm-mode = "0x010,xfi-10g-kr";
457 local-mac-address = [00 00 00 00 00 00];
458 phy-handle = <&xfi10>;
459 };
460 xfi-10g-kr11 {
461 reg = <1>;
462 qlm-mode = "0x011,xfi-10g-kr";
463 local-mac-address = [00 00 00 00 00 00];
464 phy-handle = <&xfi11>;
465 };
466 xfi-10g-kr12 {
467 reg = <2>;
468 qlm-mode = "0x012,xfi-10g-kr";
469 local-mac-address = [00 00 00 00 00 00];
470 phy-handle = <&xfi12>;
471 };
472 xfi-10g-kr13 {
473 reg = <3>;
474 qlm-mode = "0x013,xfi-10g-kr";
475 local-mac-address = [00 00 00 00 00 00];
476 phy-handle = <&xfi13>;
477 };
478 xlaui10 {
479 reg = <0>;
480 qlm-mode = "0x010,xlaui";
481 local-mac-address = [00 00 00 00 00 00];
482 phy-handle = <&xlaui10>;
483 };
484 xlaui-40g-kr-10 {
485 reg = <0>;
486 qlm-mode = "0x010,xlaui-40g-kr";
487 local-mac-address = [00 00 00 00 00 00];
488 phy-handle = <&xlaui10>;
489 };
490 xaui10 {
491 reg = <0>;
492 qlm-mode = "0x010,xaui";
493 local-mac-address = [00 00 00 00 00 00];
494 phy-handle = <&xaui10>;
495 };
496 rxaui10 {
497 reg = <8>;
498 qlm-mode = "0x010,rxaui";
499 local-mac-address = [00 00 00 00 00 00];
500 phy-handle = <&rxaui10>;
501 };
502 rxaui11 {
503 reg = <9>;
504 qlm-mode = "0x011,rxaui";
505 local-mac-address = [00 00 00 00 00 00];
506 phy-handle = <&rxaui11>;
507 };
508 qsgmii10 {
509 reg = <0>;
510 qlm-mode = "0x010,qsgmii";
511 local-mac-address = [00 00 00 00 00 00];
512 phy-handle = <&qsgmii10>;
513 };
514 qsgmii11 {
515 reg = <1>;
516 qlm-mode = "0x011,qsgmii";
517 local-mac-address = [00 00 00 00 00 00];
518 phy-handle = <&qsgmii11>;
519 };
520 qsgmii12 {
521 reg = <2>;
522 qlm-mode = "0x012,qsgmii";
523 local-mac-address = [00 00 00 00 00 00];
524 phy-handle = <&qsgmii12>;
525 };
526 qsgmii13 {
527 reg = <3>;
528 qlm-mode = "0x013,qsgmii";
529 local-mac-address = [00 00 00 00 00 00];
530 phy-handle = <&qsgmii13>;
531 };
532 };
533};
534
535&mmc_1_4 {
536 /* Power on GPIO 8, active high, shared */
537 power-gpios = <&gpio_6_0 8 0>;
538
539 mmc-slot@0 {
540 compatible = "cavium,thunder-8890-mmc-slot";
541 reg = <0>;
542 /* Only 3.3v is supported */
543 voltage-ranges = <3300 3300>;
544 max-frequency = <26000000>;
545 /* 1.8v is not supported */
546 no-1-8-v;
547 /* Bus width is only 8 bits maximum */
548 bus-width = <8>;
549 /* Write-protect */
550 wp-gpios = <&gpio_6_0 26 0>;
551 /* Card detect */
552 cd-gpios = <&gpio_6_0 27 1>;
553
554 /* SD UHS SDR25 is supported */
555 sd-uhs-sdr25;
556 /* High-speed mode is supported */
557 cap-sd-highspeed;
558 cap-mmc-highspeed;
559 };
560 mmc-slot@1 {
561 compatible = "cavium,thunder-8890-mmc-slot";
562 reg = <1>;
563 /* Only 3.3v is supported */
564 voltage-ranges = <3300 3300>;
565 max-frequency = <26000000>;
566 /* 1.8v is not supported */
567 no-1-8-v;
568 /* Bus width is only 8 bits maximum */
569 bus-width = <8>;
570 /* Write-protect */
571 wp-gpios = <&gpio_6_0 24 0>;
572 /* Card detect */
573 cd-gpios = <&gpio_6_0 25 1>;
574 /* SD UHS SDR25 is supported */
575 sd-uhs-sdr25;
576 /* High-speed mode is supported */
577 cap-sd-highspeed;
578 cap-mmc-highspeed;
579 };
580};
581
582&i2c_9_0 {
583 rtc@68 {
584 compatible = "dallas,ds1337";
585 reg = <0x68>;
586 rtcmodel = <1>;
587 };
588 gpio1: cpld@6c {
589 compatible = "gpio-i2c", "cavium,cpld8104";
590 gpio-controller;
591 reg = <0x6c>;
592 ngpios = <160>; // 8bits for each reg 0..0x13
593 #gpio-cells = <2>;
594 };
595};
596
597&spi_7_0 {
598 flash@0 {
599 compatible = "jedec,spi-nor", "spi-flash";
600 reg = <0x0>;
601 spi-max-frequency = <16000000>;
602 #address-cells = <1>;
603 #size-cells = <1>;
604 };
605 slic0@2 {
606 compatible = "silabs,si32260", "linux,spidev";
607 reg = <2>;
608 spi-max-frequency = <2500000>;
609 reset-gpios = <&gpio1 74 1>;
610 irq-gpios = <&gpio_6_0 3>;
611 tx = <&tdm 0>;
612 rx = <&tdm 1>;
613 };
614 slic1@3 {
615 compatible = "silabs,si32260", "linux,spidev";
616 reg = <3>;
617 spi-max-frequency = <2500000>;
618 reset-gpios = <&gpio1 75 1>;
619 irq-gpios = <&gpio_6_0 5>;
620 tx = <&tdm 2>;
621 rx = <&tdm 3>;
622 };
623};
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts
new file mode 100644
index 0000000..38edad8
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8304-linux.dts
@@ -0,0 +1,992 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn83xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 sgmii20: sgmii20 {
58 qlm-mode = "0x020,sgmii";
59 reg = <0x14>;
60 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
61 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
62 marvell,reg-init = <3 0x10 0 0x8665>,
63 <3 0x11 0 0x00aa>,
64 <3 0x12 0 0x4105>,
65 <3 0x13 0 0x8a08>;
66 };
67 sgmii21: sgmii21 {
68 qlm-mode = "0x021,sgmii";
69 reg = <0x15>;
70 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
71 marvell,reg-init = <3 0x10 0 0x8665>,
72 <3 0x11 0 0x00aa>,
73 <3 0x12 0 0x4105>,
74 <3 0x13 0 0x8a08>;
75 };
76 sgmii22: sgmii22 {
77 qlm-mode = "0x022,sgmii";
78 reg = <0x16>;
79 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
80 marvell,reg-init = <3 0x10 0 0x8665>,
81 <3 0x11 0 0x00aa>,
82 <3 0x12 0 0x4105>,
83 <3 0x13 0 0x8a08>;
84 };
85 sgmii23: sgmii23 {
86 qlm-mode = "0x023,sgmii";
87 reg = <0x17>;
88 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
89 marvell,reg-init = <3 0x10 0 0x8665>,
90 <3 0x11 0 0x00aa>,
91 <3 0x12 0 0x4105>,
92 <3 0x13 0 0x8a08>;
93 };
94 xfi20: xfi20 {
95 qlm-mode = "0x020,xfi","0x020,xfi-10g-kr";
96 reg = <0x14> ;
97 compatible = "cortina,cs4223-slice";
98 };
99 xfi21: xfi21 {
100 qlm-mode = "0x021,xfi","0x021,xfi-10g-kr";
101 reg = <0x15> ;
102 compatible = "cortina,cs4223-slice";
103 };
104 xfi22: xfi22 {
105 qlm-mode = "0x022,xfi","0x022,xfi-10g-kr";
106 reg = <0x16> ;
107 compatible = "cortina,cs4223-slice";
108 };
109 xfi23: xfi23 {
110 qlm-mode = "0x023,xfi","0x023,xfi-10g-kr";
111 reg = <0x17> ;
112 compatible = "cortina,cs4223-slice";
113 };
114 xlaui20: xlaui20 {
115 qlm-mode = "0x020,xlaui","0x020,xlaui-40g-kr";
116 reg = <0x14> ;
117 compatible = "cortina,cs4223-slice";
118 };
119 xaui20: xaui20 {
120 qlm-mode = "0x020,xaui";
121 reg = <0x14> ;
122 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
123 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
124 };
125 rxaui20: rxaui20 {
126 qlm-mode = "0x020,rxaui";
127 reg = <0x14> ;
128 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
129 };
130 rxaui21: rxaui21 {
131 qlm-mode = "0x021,rxaui";
132 reg = <0x15> ;
133 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
134 };
135 qsgmii20: qsgmii20 {
136 qlm-mode = "0x020,qsgmii";
137 reg = <0x14> ;
138 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
139 };
140 qsgmii21: qsgmii21 {
141 qlm-mode = "0x021,qsgmii";
142 reg = <0x15> ;
143 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
144 };
145 qsgmii22: qsgmii22 {
146 qlm-mode = "0x022,qsgmii";
147 reg = <0x16> ;
148 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
149 };
150 qsgmii23: qsgmii23 {
151 qlm-mode = "0x023,qsgmii";
152 reg = <0x17> ;
153 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
154 };
155 sgmii30: sgmii30 {
156 qlm-mode = "0x030,sgmii";
157 reg = <0x10>;
158 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
159 marvell,reg-init = <3 0x10 0 0x8665>,
160 <3 0x11 0 0x00aa>,
161 <3 0x12 0 0x4105>,
162 <3 0x13 0 0x8a08>;
163 };
164 sgmii31: sgmii31 {
165 qlm-mode = "0x031,sgmii";
166 reg = <0x11>;
167 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
168 marvell,reg-init = <3 0x10 0 0x8665>,
169 <3 0x11 0 0x00aa>,
170 <3 0x12 0 0x4105>,
171 <3 0x13 0 0x8a08>;
172 };
173 sgmii32: sgmii32 {
174 qlm-mode = "0x032,sgmii";
175 reg = <0x12>;
176 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
177 marvell,reg-init = <3 0x10 0 0x8665>,
178 <3 0x11 0 0x00aa>,
179 <3 0x12 0 0x4105>,
180 <3 0x13 0 0x8a08>;
181 };
182 sgmii33: sgmii33 {
183 qlm-mode = "0x033,sgmii";
184 reg = <0x13>;
185 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
186 marvell,reg-init = <3 0x10 0 0x8665>,
187 <3 0x11 0 0x00aa>,
188 <3 0x12 0 0x4105>,
189 <3 0x13 0 0x8a08>;
190 };
191 xfi30: xfi30 {
192 qlm-mode = "0x030,xfi","0x030,xfi-10g-kr";
193 reg = <0x10> ;
194 compatible = "cortina,cs4223-slice";
195 };
196 xfi31: xfi31 {
197 qlm-mode = "0x031,xfi","0x031,xfi-10g-kr";
198 reg = <0x11> ;
199 compatible = "cortina,cs4223-slice";
200 };
201 xfi32: xfi32 {
202 qlm-mode = "0x032,xfi","0x032,xfi-10g-kr";
203 reg = <0x12> ;
204 compatible = "cortina,cs4223-slice";
205 };
206 xfi33: xfi33 {
207 qlm-mode = "0x033,xfi","0x033,xfi-10g-kr";
208 reg = <0x13> ;
209 compatible = "cortina,cs4223-slice";
210 };
211 xlaui30: xlaui30 {
212 qlm-mode = "0x030,xlaui","0x030,xlaui-40g-kr";
213 reg = <0x10> ;
214 compatible = "cortina,cs4223-slice";
215 };
216 xaui30: xaui30 {
217 qlm-mode = "0x030,xaui";
218 reg = <0x10> ;
219 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
220 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
221 };
222 rxaui30: rxaui30 {
223 qlm-mode = "0x030,rxaui";
224 reg = <0x10> ;
225 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
226 };
227 rxaui31: rxaui31 {
228 qlm-mode = "0x031,rxaui";
229 reg = <0x11> ;
230 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
231 };
232 qsgmii30: qsgmii30 {
233 qlm-mode = "0x030,qsgmii";
234 reg = <0x10> ;
235 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
236 };
237 qsgmii31: qsgmii31 {
238 qlm-mode = "0x031,qsgmii";
239 reg = <0x11> ;
240 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
241 };
242 qsgmii32: qsgmii32 {
243 qlm-mode = "0x032,qsgmii";
244 reg = <0x12> ;
245 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
246 };
247 qsgmii33: qsgmii33 {
248 qlm-mode = "0x033,qsgmii";
249 reg = <0x13> ;
250 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
251 };
252 };
253
254 mdio1@87e005003880 {
255 compatible = "cavium,thunder-8890-mdio";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 reg = <0x87e0 0x05003880 0x0 0x30>;
259
260 sgmii00: sgmii00 {
261 qlm-mode = "0x000,sgmii";
262 reg = <0x8> ;
263 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
264 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
265 marvell,reg-init = <3 0x10 0 0x8665>,
266 <3 0x11 0 0x00aa>,
267 <3 0x12 0 0x4105>,
268 <3 0x13 0 0x8a08>;
269 };
270 sgmii01: sgmii01 {
271 qlm-mode = "0x001,sgmii";
272 reg = <0x9> ;
273 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
274 marvell,reg-init = <3 0x10 0 0x8665>,
275 <3 0x11 0 0x00aa>,
276 <3 0x12 0 0x4105>,
277 <3 0x13 0 0x8a08>;
278 };
279 sgmii02: sgmii02 {
280 qlm-mode = "0x002,sgmii";
281 reg = <0xa> ;
282 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
283 marvell,reg-init = <3 0x10 0 0x8665>,
284 <3 0x11 0 0x00aa>,
285 <3 0x12 0 0x4105>,
286 <3 0x13 0 0x8a08>;
287 };
288 sgmii03: sgmii03 {
289 qlm-mode = "0x003,sgmii";
290 reg = <0xb> ;
291 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
292 marvell,reg-init = <3 0x10 0 0x8665>,
293 <3 0x11 0 0x00aa>,
294 <3 0x12 0 0x4105>,
295 <3 0x13 0 0x8a08>;
296 };
297 xfi00: xfi00 {
298 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
299 reg = <0x8> ;
300 compatible = "cortina,cs4223-slice";
301 };
302 xfi01: xfi01 {
303 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
304 reg = <0x9> ;
305 compatible = "cortina,cs4223-slice";
306 };
307 xfi02: xfi02 {
308 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
309 reg = <0xa> ;
310 compatible = "cortina,cs4223-slice";
311 };
312 xfi03: xfi03 {
313 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
314 reg = <0xb> ;
315 compatible = "cortina,cs4223-slice";
316 };
317 xlaui00: xlaui00 {
318 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
319 reg = <0x8> ;
320 compatible = "cortina,cs4223-slice";
321 };
322 xaui00: xaui00 {
323 qlm-mode = "0x000,xaui";
324 reg = <0x8> ;
325 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
326 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
327 };
328 rxaui00: rxaui00 {
329 qlm-mode = "0x000,rxaui";
330 reg = <0x8> ;
331 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
332 };
333 rxaui01: rxaui01 {
334 qlm-mode = "0x001,rxaui";
335 reg = <0x9> ;
336 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
337 };
338 qsgmii00: qsgmii00 {
339 qlm-mode = "0x000,qsgmii";
340 reg = <0x8> ;
341 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
342 };
343 qsgmii01: qsgmii01 {
344 qlm-mode = "0x001,qsgmii";
345 reg = <0x9> ;
346 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
347 };
348 qsgmii02: qsgmii02 {
349 qlm-mode = "0x002,qsgmii";
350 reg = <0xa> ;
351 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
352 };
353 qsgmii03: qsgmii03 {
354 qlm-mode = "0x003,qsgmii";
355 reg = <0xb> ;
356 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
357 };
358 sgmii10: sgmii10 {
359 qlm-mode = "0x010,sgmii";
360 reg = <0xc>;
361 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
362 marvell,reg-init = <3 0x10 0 0x8665>,
363 <3 0x11 0 0x00aa>,
364 <3 0x12 0 0x4105>,
365 <3 0x13 0 0x8a08>;
366 };
367 sgmii11: sgmii11 {
368 qlm-mode = "0x011,sgmii";
369 reg = <0xd>;
370 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
371 marvell,reg-init = <3 0x10 0 0x8665>,
372 <3 0x11 0 0x00aa>,
373 <3 0x12 0 0x4105>,
374 <3 0x13 0 0x8a08>;
375 };
376 sgmii12: sgmii12 {
377 qlm-mode = "0x012,sgmii";
378 reg = <0xe>;
379 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
380 marvell,reg-init = <3 0x10 0 0x8665>,
381 <3 0x11 0 0x00aa>,
382 <3 0x12 0 0x4105>,
383 <3 0x13 0 0x8a08>;
384 };
385 sgmii13: sgmii13 {
386 qlm-mode = "0x013,sgmii";
387 reg = <0xf>;
388 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
389 marvell,reg-init = <3 0x10 0 0x8665>,
390 <3 0x11 0 0x00aa>,
391 <3 0x12 0 0x4105>,
392 <3 0x13 0 0x8a08>;
393 };
394 xfi10: xfi10 {
395 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
396 reg = <0xc> ;
397 compatible = "cortina,cs4223-slice";
398 };
399 xfi11: xfi11 {
400 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
401 reg = <0xd> ;
402 compatible = "cortina,cs4223-slice";
403 };
404 xfi12: xfi12 {
405 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
406 reg = <0xe> ;
407 compatible = "cortina,cs4223-slice";
408 };
409 xfi13: xfi13 {
410 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
411 reg = <0xf> ;
412 compatible = "cortina,cs4223-slice";
413 };
414 xlaui10: xlaui10 {
415 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
416 reg = <0xc> ;
417 compatible = "cortina,cs4223-slice";
418 };
419 xaui10: xaui10 {
420 qlm-mode = "0x010,xaui";
421 reg = <0xc> ;
422 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
423 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
424 };
425 rxaui10: rxaui10 {
426 qlm-mode = "0x010,rxaui";
427 reg = <0xc> ;
428 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
429 };
430 rxaui11: rxaui11 {
431 qlm-mode = "0x011,rxaui";
432 reg = <0xd> ;
433 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
434 };
435 qsgmii10: qsgmii10 {
436 qlm-mode = "0x010,qsgmii";
437 reg = <0xc> ;
438 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
439 };
440 qsgmii11: qsgmii11 {
441 qlm-mode = "0x011,qsgmii";
442 reg = <0xd> ;
443 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
444 };
445 qsgmii12: qsgmii12 {
446 qlm-mode = "0x012,qsgmii";
447 reg = <0xe> ;
448 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
449 };
450 qsgmii13: qsgmii13 {
451 qlm-mode = "0x013,qsgmii";
452 reg = <0xf> ;
453 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
454 };
455 };
456 };
457
458 bgx0 {
459 /* typename+qlm+typenumber eg :
460 sgmii+bgx0+sgmmi0
461 */
462 sgmii00 {
463 reg = <0>;
464 qlm-mode = "0x000,sgmii";
465 local-mac-address = [00 00 00 00 00 00];
466 phy-handle = <&sgmii00>;
467 };
468 sgmii01 {
469 reg = <1>;
470 qlm-mode = "0x001,sgmii";
471 local-mac-address = [00 00 00 00 00 00];
472 phy-handle = <&sgmii01>;
473 };
474 sgmii02 {
475 reg = <2>;
476 qlm-mode = "0x002,sgmii";
477 local-mac-address = [00 00 00 00 00 00];
478 phy-handle = <&sgmii02>;
479 };
480 sgmii03 {
481 reg = <3>;
482 qlm-mode = "0x003,sgmii";
483 local-mac-address = [00 00 00 00 00 00];
484 phy-handle = <&sgmii03>;
485 };
486 xfi00 {
487 reg = <0>;
488 qlm-mode = "0x000,xfi";
489 local-mac-address = [00 00 00 00 00 00];
490 phy-handle = <&xfi00>;
491 };
492 xfi01 {
493 reg = <1>;
494 qlm-mode = "0x001,xfi";
495 local-mac-address = [00 00 00 00 00 00];
496 phy-handle = <&xfi01>;
497 };
498 xfi02 {
499 reg = <2>;
500 qlm-mode = "0x002,xfi";
501 local-mac-address = [00 00 00 00 00 00];
502 phy-handle = <&xfi02>;
503 };
504 xfi03 {
505 reg = <3>;
506 qlm-mode = "0x003,xfi";
507 local-mac-address = [00 00 00 00 00 00];
508 phy-handle = <&xfi03>;
509 };
510 xfi-10g-kr00 {
511 reg = <0>;
512 qlm-mode = "0x000,xfi-10g-kr";
513 local-mac-address = [00 00 00 00 00 00];
514 phy-handle = <&xfi00>;
515 };
516 xfi-10g-kr01 {
517 reg = <1>;
518 qlm-mode = "0x001,xfi-10g-kr";
519 local-mac-address = [00 00 00 00 00 00];
520 phy-handle = <&xfi01>;
521 };
522 xfi-10g-kr02 {
523 reg = <2>;
524 qlm-mode = "0x002,xfi-10g-kr";
525 local-mac-address = [00 00 00 00 00 00];
526 phy-handle = <&xfi02>;
527 };
528 xfi-10g-kr03 {
529 reg = <3>;
530 qlm-mode = "0x003,xfi-10g-kr";
531 local-mac-address = [00 00 00 00 00 00];
532 phy-handle = <&xfi03>;
533 };
534 xlaui00 {
535 reg = <0>;
536 qlm-mode = "0x000,xlaui";
537 local-mac-address = [00 00 00 00 00 00];
538 phy-handle = <&xlaui00>;
539 };
540 xlaui-40g-kr00 {
541 reg = <0>;
542 qlm-mode = "0x000,xlaui-40g-kr";
543 local-mac-address = [00 00 00 00 00 00];
544 phy-handle = <&xlaui00>;
545 };
546 xaui00 {
547 reg = <0>;
548 qlm-mode = "0x000,xaui";
549 local-mac-address = [00 00 00 00 00 00];
550 phy-handle = <&xaui00>;
551 };
552 rxaui00 {
553 reg = <0>;
554 qlm-mode = "0x000,rxaui";
555 local-mac-address = [00 00 00 00 00 00];
556 phy-handle = <&rxaui00>;
557 };
558 rxaui01 {
559 reg = <1>;
560 qlm-mode = "0x001,rxaui";
561 local-mac-address = [00 00 00 00 00 00];
562 phy-handle = <&rxaui01>;
563 };
564 qsgmii00 {
565 reg = <0>;
566 qlm-mode = "0x000,qsgmii";
567 local-mac-address = [00 00 00 00 00 00];
568 phy-handle = <&qsgmii00>;
569 };
570 qsgmii01 {
571 reg = <1>;
572 qlm-mode = "0x001,qsgmii";
573 local-mac-address = [00 00 00 00 00 00];
574 phy-handle = <&qsgmii01>;
575 };
576 qsgmii02 {
577 reg = <2>;
578 qlm-mode = "0x002,qsgmii";
579 local-mac-address = [00 00 00 00 00 00];
580 phy-handle = <&qsgmii02>;
581 };
582 qsgmii03 {
583 reg = <3>;
584 qlm-mode = "0x003,qsgmii";
585 local-mac-address = [00 00 00 00 00 00];
586 phy-handle = <&qsgmii03>;
587 };
588 };
589 bgx1 {
590 sgmii10 {
591 reg = <0>;
592 qlm-mode = "0x010,sgmii";
593 local-mac-address = [00 00 00 00 00 00];
594 phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */
595 };
596 sgmii11 {
597 reg = <1>;
598 qlm-mode = "0x011,sgmii";
599 local-mac-address = [00 00 00 00 00 00];
600 phy-handle = <&sgmii11>;
601 };
602 sgmii12 {
603 reg = <2>;
604 qlm-mode = "0x012,sgmii";
605 local-mac-address = [00 00 00 00 00 00];
606 phy-handle = <&sgmii12>;
607 };
608 sgmii13 {
609 reg = <3>;
610 qlm-mode = "0x013,sgmii";
611 local-mac-address = [00 00 00 00 00 00];
612 phy-handle = <&sgmii13>;
613 };
614 xfi10 {
615 reg = <0>;
616 qlm-mode = "0x010,xfi";
617 local-mac-address = [00 00 00 00 00 00];
618 phy-handle = <&xfi10>;
619 };
620 xfi11 {
621 reg = <1>;
622 qlm-mode = "0x011,xfi";
623 local-mac-address = [00 00 00 00 00 00];
624 phy-handle = <&xfi11>;
625 };
626 xfi12 {
627 reg = <2>;
628 qlm-mode = "0x012,xfi";
629 local-mac-address = [00 00 00 00 00 00];
630 phy-handle = <&xfi12>;
631 };
632 xfi13 {
633 reg = <3>;
634 qlm-mode = "0x013,xfi";
635 local-mac-address = [00 00 00 00 00 00];
636 phy-handle = <&xfi13>;
637 };
638 xfi-10g-kr10 {
639 reg = <0>;
640 qlm-mode = "0x010,xfi-10g-kr";
641 local-mac-address = [00 00 00 00 00 00];
642 phy-handle = <&xfi10>;
643 };
644 xfi-10g-kr11 {
645 reg = <1>;
646 qlm-mode = "0x011,xfi-10g-kr";
647 local-mac-address = [00 00 00 00 00 00];
648 phy-handle = <&xfi11>;
649 };
650 xfi-10g-kr12 {
651 reg = <2>;
652 qlm-mode = "0x012,xfi-10g-kr";
653 local-mac-address = [00 00 00 00 00 00];
654 phy-handle = <&xfi12>;
655 };
656 xfi-10g-kr13 {
657 reg = <3>;
658 qlm-mode = "0x013,xfi-10g-kr";
659 local-mac-address = [00 00 00 00 00 00];
660 phy-handle = <&xfi13>;
661 };
662 xlaui10 {
663 reg = <0>;
664 qlm-mode = "0x010,xlaui";
665 local-mac-address = [00 00 00 00 00 00];
666 phy-handle = <&xlaui10>;
667 };
668 xlaui-40g-kr-10 {
669 reg = <0>;
670 qlm-mode = "0x010,xlaui-40g-kr";
671 local-mac-address = [00 00 00 00 00 00];
672 phy-handle = <&xlaui10>;
673 };
674 xaui10 {
675 reg = <0>;
676 qlm-mode = "0x010,xaui";
677 local-mac-address = [00 00 00 00 00 00];
678 phy-handle = <&xaui10>;
679 };
680 rxaui10 {
681 reg = <8>;
682 qlm-mode = "0x010,rxaui";
683 local-mac-address = [00 00 00 00 00 00];
684 phy-handle = <&rxaui10>;
685 };
686 rxaui11 {
687 reg = <9>;
688 qlm-mode = "0x011,rxaui";
689 local-mac-address = [00 00 00 00 00 00];
690 phy-handle = <&rxaui11>;
691 };
692 qsgmii10 {
693 reg = <0>;
694 qlm-mode = "0x010,qsgmii";
695 local-mac-address = [00 00 00 00 00 00];
696 phy-handle = <&qsgmii10>;
697 };
698 qsgmii11 {
699 reg = <1>;
700 qlm-mode = "0x011,qsgmii";
701 local-mac-address = [00 00 00 00 00 00];
702 phy-handle = <&qsgmii11>;
703 };
704 qsgmii12 {
705 reg = <2>;
706 qlm-mode = "0x012,qsgmii";
707 local-mac-address = [00 00 00 00 00 00];
708 phy-handle = <&qsgmii12>;
709 };
710 qsgmii13 {
711 reg = <3>;
712 qlm-mode = "0x013,qsgmii";
713 local-mac-address = [00 00 00 00 00 00];
714 phy-handle = <&qsgmii13>;
715 };
716 };
717
718 bgx2 {
719 sgmii20 {
720 reg = <0>;
721 qlm-mode = "0x020,sgmii";
722 local-mac-address = [00 00 00 00 00 00];
723 phy-handle = <&sgmii20>;
724 };
725 sgmii21 {
726 reg = <1>;
727 qlm-mode = "0x021,sgmii";
728 local-mac-address = [00 00 00 00 00 00];
729 phy-handle = <&sgmii21>;
730 };
731 sgmii22 {
732 reg = <2>;
733 qlm-mode = "0x022,sgmii";
734 local-mac-address = [00 00 00 00 00 00];
735 phy-handle = <&sgmii22>;
736 };
737 sgmii23 {
738 reg = <3>;
739 qlm-mode = "0x023,sgmii";
740 local-mac-address = [00 00 00 00 00 00];
741 phy-handle = <&sgmii23>;
742 };
743 xfi20 {
744 reg = <0>;
745 qlm-mode = "0x020,xfi";
746 local-mac-address = [00 00 00 00 00 00];
747 phy-handle = <&xfi20>;
748 };
749 xfi21 {
750 reg = <1>;
751 qlm-mode = "0x021,xfi";
752 local-mac-address = [00 00 00 00 00 00];
753 phy-handle = <&xfi21>;
754 };
755 xfi22 {
756 reg = <2>;
757 qlm-mode = "0x022,xfi";
758 local-mac-address = [00 00 00 00 00 00];
759 phy-handle = <&xfi22>;
760 };
761 xfi23 {
762 reg = <3>;
763 qlm-mode = "0x023,xfi";
764 local-mac-address = [00 00 00 00 00 00];
765 phy-handle = <&xfi23>;
766 };
767 xfi-10g-kr20 {
768 reg = <0>;
769 qlm-mode = "0x020,xfi-10g-kr";
770 local-mac-address = [00 00 00 00 00 00];
771 phy-handle = <&xfi20>;
772 };
773 xfi-10g-kr21 {
774 reg = <1>;
775 qlm-mode = "0x021,xfi-10g-kr";
776 local-mac-address = [00 00 00 00 00 00];
777 phy-handle = <&xfi21>;
778 };
779 xfi-10g-kr22 {
780 reg = <2>;
781 qlm-mode = "0x022,xfi-10g-kr";
782 local-mac-address = [00 00 00 00 00 00];
783 phy-handle = <&xfi22>;
784 };
785 xfi-10g-kr23 {
786 reg = <3>;
787 qlm-mode = "0x023,xfi-10g-kr";
788 local-mac-address = [00 00 00 00 00 00];
789 phy-handle = <&xfi23>;
790 };
791 xlaui20 {
792 reg = <0>;
793 qlm-mode = "0x020,xlaui";
794 local-mac-address = [00 00 00 00 00 00];
795 phy-handle = <&xlaui20>;
796 };
797 xlaui-40g-kr20 {
798 reg = <0>;
799 qlm-mode = "0x020,xlaui-40g-kr";
800 local-mac-address = [00 00 00 00 00 00];
801 phy-handle = <&xlaui20>;
802 };
803 xaui20 {
804 reg = <0>;
805 qlm-mode = "0x020,xaui";
806 local-mac-address = [00 00 00 00 00 00];
807 phy-handle = <&xaui20>;
808 };
809 rxaui20 {
810 reg = <0>;
811 qlm-mode = "0x020,rxaui";
812 local-mac-address = [00 00 00 00 00 00];
813 phy-handle = <&rxaui20>;
814 };
815 rxaui21 {
816 reg = <1>;
817 qlm-mode = "0x021,rxaui";
818 local-mac-address = [00 00 00 00 00 00];
819 phy-handle = <&rxaui21>;
820 };
821 qsgmii20 {
822 reg = <0>;
823 qlm-mode = "0x020,qsgmii";
824 local-mac-address = [00 00 00 00 00 00];
825 phy-handle = <&qsgmii20>;
826 };
827 qsgmii21 {
828 reg = <1>;
829 qlm-mode = "0x021,qsgmii";
830 local-mac-address = [00 00 00 00 00 00];
831 phy-handle = <&qsgmii21>;
832 };
833 qsgmii22 {
834 reg = <2>;
835 qlm-mode = "0x022,qsgmii";
836 local-mac-address = [00 00 00 00 00 00];
837 phy-handle = <&qsgmii22>;
838 };
839 qsgmii23 {
840 reg = <3>;
841 qlm-mode = "0x023,qsgmii";
842 local-mac-address = [00 00 00 00 00 00];
843 phy-handle = <&qsgmii23>;
844 };
845 };
846
847 bgx3 {
848 sgmii30 {
849 reg = <0>;
850 qlm-mode = "0x030,sgmii";
851 local-mac-address = [00 00 00 00 00 00];
852 phy-handle = <&sgmii30>;
853 };
854 sgmii31 {
855 reg = <1>;
856 qlm-mode = "0x031,sgmii";
857 local-mac-address = [00 00 00 00 00 00];
858 phy-handle = <&sgmii31>;
859 };
860 xfi30 {
861 reg = <0>;
862 qlm-mode = "0x030,xfi";
863 local-mac-address = [00 00 00 00 00 00];
864 phy-handle = <&xfi30>;
865 };
866 xfi31 {
867 reg = <1>;
868 qlm-mode = "0x031,xfi";
869 local-mac-address = [00 00 00 00 00 00];
870 phy-handle = <&xfi31>;
871 };
872 xfi-10g-kr30 {
873 reg = <0>;
874 qlm-mode = "0x030,xfi-10g-kr";
875 local-mac-address = [00 00 00 00 00 00];
876 phy-handle = <&xfi30>;
877 };
878 xfi-10g-kr31 {
879 reg = <1>;
880 qlm-mode = "0x031,xfi-10g-kr";
881 local-mac-address = [00 00 00 00 00 00];
882 phy-handle = <&xfi31>;
883 };
884 xaui30 {
885 reg = <0>;
886 qlm-mode = "0x030,xaui";
887 local-mac-address = [00 00 00 00 00 00];
888 phy-handle = <&xaui30>;
889 };
890 rxaui30 {
891 reg = <0>;
892 qlm-mode = "0x030,rxaui";
893 local-mac-address = [00 00 00 00 00 00];
894 phy-handle = <&rxaui30>;
895 };
896 rxaui31 {
897 reg = <1>;
898 qlm-mode = "0x031,rxaui";
899 local-mac-address = [00 00 00 00 00 00];
900 phy-handle = <&rxaui31>;
901 };
902 qsgmii30 {
903 reg = <0>;
904 qlm-mode = "0x030,qsgmii";
905 local-mac-address = [00 00 00 00 00 00];
906 phy-handle = <&qsgmii30>;
907 };
908 qsgmii31 {
909 reg = <1>;
910 qlm-mode = "0x031,qsgmii";
911 local-mac-address = [00 00 00 00 00 00];
912 phy-handle = <&qsgmii31>;
913 };
914 qsgmii32 {
915 reg = <2>;
916 qlm-mode = "0x032,qsgmii";
917 local-mac-address = [00 00 00 00 00 00];
918 phy-handle = <&qsgmii32>;
919 };
920 qsgmii33 {
921 reg = <3>;
922 qlm-mode = "0x033,qsgmii";
923 local-mac-address = [00 00 00 00 00 00];
924 phy-handle = <&qsgmii33>;
925 };
926 };
927};
928
929&mmc_1_4 {
930 /* Power on GPIO 8, active high, shared */
931 power-gpios = <&gpio_6_0 8 0>;
932
933 mmc-slot@0 {
934 compatible = "cavium,thunder-8890-mmc-slot";
935 reg = <0>;
936 /* Only 3.3v is supported */
937 voltage-ranges = <3300 3300>;
938 max-frequency = <26000000>;
939 /* 1.8v is not supported */
940 no-1-8-v;
941 /* Bus width is only 8 bits maximum */
942 bus-width = <8>;
943 /* Write-protect */
944 wp-gpios = <&gpio_6_0 22 0>;
945 /* Card detect */
946 cd-gpios = <&gpio_6_0 23 1>;
947
948 /* SD UHS SDR25 is supported */
949 sd-uhs-sdr25;
950 /* High-speed mode is supported */
951 cap-sd-highspeed;
952 cap-mmc-highspeed;
953 };
954 mmc-slot@1 {
955 compatible = "cavium,thunder-8890-mmc-slot";
956 reg = <1>;
957 /* Only 3.3v is supported */
958 voltage-ranges = <3300 3300>;
959 max-frequency = <26000000>;
960 /* 1.8v is not supported */
961 no-1-8-v;
962 /* Bus width is only 8 bits maximum */
963 bus-width = <8>;
964 /* Write-protect */
965 wp-gpios = <&gpio_6_0 24 0>;
966 /* Card detect */
967 cd-gpios = <&gpio_6_0 25 1>;
968 /* SD UHS SDR25 is supported */
969 sd-uhs-sdr25;
970 /* High-speed mode is supported */
971 cap-sd-highspeed;
972 cap-mmc-highspeed;
973 };
974};
975
976&i2c_9_0 {
977 rtc@68 {
978 compatible = "dallas,ds1337";
979 reg = <0x68>;
980 rtcmodel = <1>;
981 };
982};
983
984&spi_7_0 {
985 flash@0 {
986 compatible = "micron,n25q128a13", "jedec,spi-nor", "spi-flash";
987 reg = <0x0>;
988 spi-max-frequency = <16000000>;
989 #address-cells = <1>;
990 #size-cells = <1>;
991 };
992};
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts b/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts
new file mode 100644
index 0000000..6a4037d
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8604-linux.dts
@@ -0,0 +1,49 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2014, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/dts-v1/;
46
47/include/ "generic-linux.dtsi"
48
49/include/ "ebb8604-phy.dtsi" \ No newline at end of file
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi b/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi
new file mode 100644
index 0000000..7cbc016
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8604-phy.dtsi
@@ -0,0 +1,123 @@
1
2
3/ {
4 soc@0 {
5 pci@848000000000 {
6 mrml-bridge@1,0 {
7 mdio-nexus@1,3 {
8 mdio@87e005003880 {
9 sgmii00: sgmii@8 {
10 qlm-mode = "0x000,sgmii";
11 reg = <8> ;
12 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
13 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
14 marvell,reg-init = <3 0x10 0 0x8665>,
15 <3 0x11 0 0x00aa>,
16 <3 0x12 0 0x4105>,
17 <3 0x13 0 0x8a08>;
18
19 };
20 sgmii01: sgmii@9 {
21 qlm-mode = "0x001,sgmii";
22 reg = <9> ;
23 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
24 marvell,reg-init = <3 0x10 0 0x8665>,
25 <3 0x11 0 0x00aa>,
26 <3 0x12 0 0x4105>,
27 <3 0x13 0 0x8a08>;
28 };
29 sgmii02: sgmii@a {
30 qlm-mode = "0x002,sgmii";
31 reg = <0xa> ;
32 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
33 marvell,reg-init = <3 0x10 0 0x8665>,
34 <3 0x11 0 0x00aa>,
35 <3 0x12 0 0x4105>,
36 <3 0x13 0 0x8a08>;
37 };
38 sgmii03: sgmii@b {
39 qlm-mode = "0x003,sgmii";
40 reg = <0xb> ;
41 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
42 marvell,reg-init = <3 0x10 0 0x8665>,
43 <3 0x11 0 0x00aa>,
44 <3 0x12 0 0x4105>,
45 <3 0x13 0 0x8a08>;
46 };
47 xaui00: xaui@8 {
48 qlm-mode = "0x000,xaui";
49 reg = <8> ;
50 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
51 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
52 };
53 rxaui00: rxaui@8 {
54 qlm-mode = "0x000,rxaui";
55 reg = <8> ;
56 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
57 };
58 rxaui02: rxaui@9 {
59 qlm-mode = "0x002,rxaui";
60 reg = <9> ;
61 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
62 };
63
64
65 sgmii10: sgmii@c {
66 qlm-mode = "0x010,sgmii";
67 reg = <0xc> ;
68 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii11: sgmii@d {
75 qlm-mode = "0x011,sgmii";
76 reg = <0xd> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 sgmii12: sgmii@e {
84 qlm-mode = "0x012,sgmii";
85 reg = <0xe> ;
86 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
87 marvell,reg-init = <3 0x10 0 0x8665>,
88 <3 0x11 0 0x00aa>,
89 <3 0x12 0 0x4105>,
90 <3 0x13 0 0x8a08>;
91 };
92 sgmii13: sgmii@f {
93 qlm-mode = "0x013,sgmii";
94 reg = <0xf> ;
95 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
96 marvell,reg-init = <3 0x10 0 0x8665>,
97 <3 0x11 0 0x00aa>,
98 <3 0x12 0 0x4105>,
99 <3 0x13 0 0x8a08>;
100 };
101 xaui10: xaui@c {
102 qlm-mode = "0x010,xaui";
103 reg = <0xc> ;
104 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
105 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
106 };
107 rxaui10: rxaui@c {
108 qlm-mode = "0x010,rxaui";
109 reg = <0xc> ;
110 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
111 };
112 rxaui12: rxaui@d {
113 qlm-mode = "0x012,rxaui";
114 reg = <0xd> ;
115 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
116 };
117 };
118 };
119 };
120 };
121 };
122
123};
diff --git a/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi b/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi
new file mode 100644
index 0000000..410ac4b
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/ebb8800-phy.dtsi
@@ -0,0 +1,123 @@
1
2
3/ {
4 soc@0 {
5 pci@848000000000 {
6 mrml-bridge@1,0 {
7 mdio-nexus@1,3 {
8 mdio@87e005003800 {
9 sgmii00: sgmii@0 {
10 qlm-mode = "0x000,sgmii";
11 reg = <0> ;
12 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
13 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
14 marvell,reg-init = <3 0x10 0 0x8665>,
15 <3 0x11 0 0x00aa>,
16 <3 0x12 0 0x4105>,
17 <3 0x13 0 0x8a08>;
18
19 };
20 sgmii01: sgmii@1 {
21 qlm-mode = "0x001,sgmii";
22 reg = <1> ;
23 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
24 marvell,reg-init = <3 0x10 0 0x8665>,
25 <3 0x11 0 0x00aa>,
26 <3 0x12 0 0x4105>,
27 <3 0x13 0 0x8a08>;
28 };
29 sgmii02: sgmii@2 {
30 qlm-mode = "0x002,sgmii";
31 reg = <2> ;
32 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
33 marvell,reg-init = <3 0x10 0 0x8665>,
34 <3 0x11 0 0x00aa>,
35 <3 0x12 0 0x4105>,
36 <3 0x13 0 0x8a08>;
37 };
38 sgmii03: sgmii@3 {
39 qlm-mode = "0x003,sgmii";
40 reg = <3> ;
41 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
42 marvell,reg-init = <3 0x10 0 0x8665>,
43 <3 0x11 0 0x00aa>,
44 <3 0x12 0 0x4105>,
45 <3 0x13 0 0x8a08>;
46 };
47 xaui00: xaui@0 {
48 qlm-mode = "0x000,xaui";
49 reg = <0> ;
50 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
51 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
52 };
53 rxaui00: rxaui@0 {
54 qlm-mode = "0x000,rxaui";
55 reg = <0> ;
56 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
57 };
58 rxaui02: rxaui@2 {
59 qlm-mode = "0x002,rxaui";
60 reg = <1> ;
61 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
62 };
63 };
64 mdio@87e005003880 {
65 sgmii10: sgmii@4 {
66 qlm-mode = "0x010,sgmii";
67 reg = <4> ;
68 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
69 marvell,reg-init = <3 0x10 0 0x8665>,
70 <3 0x11 0 0x00aa>,
71 <3 0x12 0 0x4105>,
72 <3 0x13 0 0x8a08>;
73 };
74 sgmii11: sgmii@5 {
75 qlm-mode = "0x011,sgmii";
76 reg = <5> ;
77 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
78 marvell,reg-init = <3 0x10 0 0x8665>,
79 <3 0x11 0 0x00aa>,
80 <3 0x12 0 0x4105>,
81 <3 0x13 0 0x8a08>;
82 };
83 sgmii12: sgmii@6 {
84 qlm-mode = "0x012,sgmii";
85 reg = <6> ;
86 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
87 marvell,reg-init = <3 0x10 0 0x8665>,
88 <3 0x11 0 0x00aa>,
89 <3 0x12 0 0x4105>,
90 <3 0x13 0 0x8a08>;
91 };
92 sgmii13: sgmii@7 {
93 qlm-mode = "0x013,sgmii";
94 reg = <7> ;
95 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
96 marvell,reg-init = <3 0x10 0 0x8665>,
97 <3 0x11 0 0x00aa>,
98 <3 0x12 0 0x4105>,
99 <3 0x13 0 0x8a08>;
100 };
101 xaui10: xaui@4 {
102 qlm-mode = "0x010,xaui";
103 reg = <4> ;
104 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
105 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
106 };
107 rxaui10: rxaui@0 {
108 qlm-mode = "0x010,rxaui";
109 reg = <0> ;
110 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
111 };
112 rxaui12: rxaui@2 {
113 qlm-mode = "0x012,rxaui";
114 reg = <1> ;
115 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
116 };
117 };
118 };
119 };
120 };
121 };
122
123}; \ No newline at end of file
diff --git a/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts
new file mode 100644
index 0000000..53b9813
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dts
@@ -0,0 +1,54 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2014, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "generic-linux.dtsi"
53
54/include/ "ebb8800-phy.dtsi" \ No newline at end of file
diff --git a/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi
new file mode 100644
index 0000000..68fc692
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/generic-linux.dtsi
@@ -0,0 +1,2721 @@
1/*
2 * Cavium Thunder DTS file - Thunder SoC description
3 *
4 * Copyright (C) 2014-2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/ {
51 model = "Cavium ThunderX CN88XX board";
52 compatible = "cavium,thunder-88xx";
53 interrupt-parent = <&gic0>;
54 #address-cells = <2>;
55 #size-cells = <2>;
56
57 psci {
58 compatible = "arm,psci-0.2";
59 method = "smc";
60 };
61
62 cpus {
63 #address-cells = <2>;
64 #size-cells = <0>;
65
66 cpu-map {
67 cluster0 {
68 core0 {
69 cpu = <&CPU0>;
70 };
71 core1 {
72 cpu = <&CPU1>;
73 };
74 core2 {
75 cpu = <&CPU2>;
76 };
77 core3 {
78 cpu = <&CPU3>;
79 };
80 core4 {
81 cpu = <&CPU4>;
82 };
83 core5 {
84 cpu = <&CPU5>;
85 };
86 core6 {
87 cpu = <&CPU6>;
88 };
89 core7 {
90 cpu = <&CPU7>;
91 };
92 core8 {
93 cpu = <&CPU8>;
94 };
95 core9 {
96 cpu = <&CPU9>;
97 };
98 core10 {
99 cpu = <&CPU10>;
100 };
101 core11 {
102 cpu = <&CPU11>;
103 };
104 core12 {
105 cpu = <&CPU12>;
106 };
107 core13 {
108 cpu = <&CPU13>;
109 };
110 core14 {
111 cpu = <&CPU14>;
112 };
113 core15 {
114 cpu = <&CPU15>;
115 };
116 core16 {
117 cpu = <&CPU16>;
118 };
119 core17 {
120 cpu = <&CPU17>;
121 };
122 core18 {
123 cpu = <&CPU18>;
124 };
125 core19 {
126 cpu = <&CPU19>;
127 };
128 core20 {
129 cpu = <&CPU20>;
130 };
131 core21 {
132 cpu = <&CPU21>;
133 };
134 core22 {
135 cpu = <&CPU22>;
136 };
137 core23 {
138 cpu = <&CPU23>;
139 };
140 core24 {
141 cpu = <&CPU24>;
142 };
143 core25 {
144 cpu = <&CPU25>;
145 };
146 core26 {
147 cpu = <&CPU26>;
148 };
149 core27 {
150 cpu = <&CPU27>;
151 };
152 core28 {
153 cpu = <&CPU28>;
154 };
155 core29 {
156 cpu = <&CPU29>;
157 };
158 core30 {
159 cpu = <&CPU30>;
160 };
161 core31 {
162 cpu = <&CPU31>;
163 };
164 core32 {
165 cpu = <&CPU32>;
166 };
167 core33 {
168 cpu = <&CPU33>;
169 };
170 core34 {
171 cpu = <&CPU34>;
172 };
173 core35 {
174 cpu = <&CPU35>;
175 };
176 core36 {
177 cpu = <&CPU36>;
178 };
179 core37 {
180 cpu = <&CPU37>;
181 };
182 core38 {
183 cpu = <&CPU38>;
184 };
185 core39 {
186 cpu = <&CPU39>;
187 };
188 core40 {
189 cpu = <&CPU40>;
190 };
191 core41 {
192 cpu = <&CPU41>;
193 };
194 core42 {
195 cpu = <&CPU42>;
196 };
197 core43 {
198 cpu = <&CPU43>;
199 };
200 core44 {
201 cpu = <&CPU44>;
202 };
203 core45 {
204 cpu = <&CPU45>;
205 };
206 core46 {
207 cpu = <&CPU46>;
208 };
209 core47 {
210 cpu = <&CPU47>;
211 };
212 };
213
214 cluster1 {
215 core0 {
216 cpu = <&CPU48>;
217 };
218 core1 {
219 cpu = <&CPU49>;
220 };
221 core2 {
222 cpu = <&CPU50>;
223 };
224 core3 {
225 cpu = <&CPU51>;
226 };
227 core4 {
228 cpu = <&CPU52>;
229 };
230 core5 {
231 cpu = <&CPU53>;
232 };
233 core6 {
234 cpu = <&CPU54>;
235 };
236 core7 {
237 cpu = <&CPU55>;
238 };
239 core8 {
240 cpu = <&CPU56>;
241 };
242 core9 {
243 cpu = <&CPU57>;
244 };
245 core10 {
246 cpu = <&CPU58>;
247 };
248 core11 {
249 cpu = <&CPU59>;
250 };
251 core12 {
252 cpu = <&CPU60>;
253 };
254 core13 {
255 cpu = <&CPU61>;
256 };
257 core14 {
258 cpu = <&CPU62>;
259 };
260 core15 {
261 cpu = <&CPU63>;
262 };
263 core16 {
264 cpu = <&CPU64>;
265 };
266 core17 {
267 cpu = <&CPU65>;
268 };
269 core18 {
270 cpu = <&CPU66>;
271 };
272 core19 {
273 cpu = <&CPU67>;
274 };
275 core20 {
276 cpu = <&CPU68>;
277 };
278 core21 {
279 cpu = <&CPU69>;
280 };
281 core22 {
282 cpu = <&CPU70>;
283 };
284 core23 {
285 cpu = <&CPU71>;
286 };
287 core24 {
288 cpu = <&CPU72>;
289 };
290 core25 {
291 cpu = <&CPU73>;
292 };
293 core26 {
294 cpu = <&CPU74>;
295 };
296 core27 {
297 cpu = <&CPU75>;
298 };
299 core28 {
300 cpu = <&CPU76>;
301 };
302 core29 {
303 cpu = <&CPU77>;
304 };
305 core30 {
306 cpu = <&CPU78>;
307 };
308 core31 {
309 cpu = <&CPU79>;
310 };
311 core32 {
312 cpu = <&CPU80>;
313 };
314 core33 {
315 cpu = <&CPU81>;
316 };
317 core34 {
318 cpu = <&CPU82>;
319 };
320 core35 {
321 cpu = <&CPU83>;
322 };
323 core36 {
324 cpu = <&CPU84>;
325 };
326 core37 {
327 cpu = <&CPU85>;
328 };
329 core38 {
330 cpu = <&CPU86>;
331 };
332 core39 {
333 cpu = <&CPU87>;
334 };
335 core40 {
336 cpu = <&CPU88>;
337 };
338 core41 {
339 cpu = <&CPU89>;
340 };
341 core42 {
342 cpu = <&CPU90>;
343 };
344 core43 {
345 cpu = <&CPU91>;
346 };
347 core44 {
348 cpu = <&CPU92>;
349 };
350 core45 {
351 cpu = <&CPU93>;
352 };
353 core46 {
354 cpu = <&CPU94>;
355 };
356 core47 {
357 cpu = <&CPU95>;
358 };
359 };
360 };
361
362 CPU0: cpu@0 {
363 device_type = "cpu";
364 compatible = "cavium,thunder", "arm,armv8";
365 reg = <0x0 0x000>;
366 enable-method = "psci";
367 /* socket 0 */
368 numa-node-id = <0>;
369 next-level-cache = <&thunderx_L2_0>;
370 };
371 CPU1: cpu@1 {
372 device_type = "cpu";
373 compatible = "cavium,thunder", "arm,armv8";
374 reg = <0x0 0x001>;
375 enable-method = "psci";
376 numa-node-id = <0>;
377 next-level-cache = <&thunderx_L2_0>;
378 };
379 CPU2: cpu@2 {
380 device_type = "cpu";
381 compatible = "cavium,thunder", "arm,armv8";
382 reg = <0x0 0x002>;
383 enable-method = "psci";
384 numa-node-id = <0>;
385 next-level-cache = <&thunderx_L2_0>;
386 };
387 CPU3: cpu@3 {
388 device_type = "cpu";
389 compatible = "cavium,thunder", "arm,armv8";
390 reg = <0x0 0x003>;
391 enable-method = "psci";
392 numa-node-id = <0>;
393 next-level-cache = <&thunderx_L2_0>;
394 };
395 CPU4: cpu@4 {
396 device_type = "cpu";
397 compatible = "cavium,thunder", "arm,armv8";
398 reg = <0x0 0x004>;
399 enable-method = "psci";
400 numa-node-id = <0>;
401 next-level-cache = <&thunderx_L2_0>;
402 };
403 CPU5: cpu@5 {
404 device_type = "cpu";
405 compatible = "cavium,thunder", "arm,armv8";
406 reg = <0x0 0x005>;
407 enable-method = "psci";
408 numa-node-id = <0>;
409 next-level-cache = <&thunderx_L2_0>;
410 };
411 CPU6: cpu@6 {
412 device_type = "cpu";
413 compatible = "cavium,thunder", "arm,armv8";
414 reg = <0x0 0x006>;
415 enable-method = "psci";
416 numa-node-id = <0>;
417 next-level-cache = <&thunderx_L2_0>;
418 };
419 CPU7: cpu@7 {
420 device_type = "cpu";
421 compatible = "cavium,thunder", "arm,armv8";
422 reg = <0x0 0x007>;
423 enable-method = "psci";
424 numa-node-id = <0>;
425 next-level-cache = <&thunderx_L2_0>;
426 };
427 CPU8: cpu@8 {
428 device_type = "cpu";
429 compatible = "cavium,thunder", "arm,armv8";
430 reg = <0x0 0x008>;
431 enable-method = "psci";
432 numa-node-id = <0>;
433 next-level-cache = <&thunderx_L2_0>;
434 };
435 CPU9: cpu@9 {
436 device_type = "cpu";
437 compatible = "cavium,thunder", "arm,armv8";
438 reg = <0x0 0x009>;
439 enable-method = "psci";
440 numa-node-id = <0>;
441 next-level-cache = <&thunderx_L2_0>;
442 };
443 CPU10: cpu@a {
444 device_type = "cpu";
445 compatible = "cavium,thunder", "arm,armv8";
446 reg = <0x0 0x00a>;
447 enable-method = "psci";
448 numa-node-id = <0>;
449 next-level-cache = <&thunderx_L2_0>;
450 };
451 CPU11: cpu@b {
452 device_type = "cpu";
453 compatible = "cavium,thunder", "arm,armv8";
454 reg = <0x0 0x00b>;
455 enable-method = "psci";
456 numa-node-id = <0>;
457 next-level-cache = <&thunderx_L2_0>;
458 };
459 CPU12: cpu@c {
460 device_type = "cpu";
461 compatible = "cavium,thunder", "arm,armv8";
462 reg = <0x0 0x00c>;
463 enable-method = "psci";
464 numa-node-id = <0>;
465 next-level-cache = <&thunderx_L2_0>;
466 };
467 CPU13: cpu@d {
468 device_type = "cpu";
469 compatible = "cavium,thunder", "arm,armv8";
470 reg = <0x0 0x00d>;
471 enable-method = "psci";
472 numa-node-id = <0>;
473 next-level-cache = <&thunderx_L2_0>;
474 };
475 CPU14: cpu@e {
476 device_type = "cpu";
477 compatible = "cavium,thunder", "arm,armv8";
478 reg = <0x0 0x00e>;
479 enable-method = "psci";
480 numa-node-id = <0>;
481 next-level-cache = <&thunderx_L2_0>;
482 };
483 CPU15: cpu@f {
484 device_type = "cpu";
485 compatible = "cavium,thunder", "arm,armv8";
486 reg = <0x0 0x00f>;
487 enable-method = "psci";
488 numa-node-id = <0>;
489 next-level-cache = <&thunderx_L2_0>;
490 };
491 CPU16: cpu@100 {
492 device_type = "cpu";
493 compatible = "cavium,thunder", "arm,armv8";
494 reg = <0x0 0x100>;
495 enable-method = "psci";
496 numa-node-id = <0>;
497 next-level-cache = <&thunderx_L2_0>;
498 };
499 CPU17: cpu@101 {
500 device_type = "cpu";
501 compatible = "cavium,thunder", "arm,armv8";
502 reg = <0x0 0x101>;
503 enable-method = "psci";
504 numa-node-id = <0>;
505 next-level-cache = <&thunderx_L2_0>;
506 };
507 CPU18: cpu@102 {
508 device_type = "cpu";
509 compatible = "cavium,thunder", "arm,armv8";
510 reg = <0x0 0x102>;
511 enable-method = "psci";
512 numa-node-id = <0>;
513 next-level-cache = <&thunderx_L2_0>;
514 };
515 CPU19: cpu@103 {
516 device_type = "cpu";
517 compatible = "cavium,thunder", "arm,armv8";
518 reg = <0x0 0x103>;
519 enable-method = "psci";
520 numa-node-id = <0>;
521 next-level-cache = <&thunderx_L2_0>;
522 };
523 CPU20: cpu@104 {
524 device_type = "cpu";
525 compatible = "cavium,thunder", "arm,armv8";
526 reg = <0x0 0x104>;
527 enable-method = "psci";
528 numa-node-id = <0>;
529 next-level-cache = <&thunderx_L2_0>;
530 };
531 CPU21: cpu@105 {
532 device_type = "cpu";
533 compatible = "cavium,thunder", "arm,armv8";
534 reg = <0x0 0x105>;
535 enable-method = "psci";
536 numa-node-id = <0>;
537 next-level-cache = <&thunderx_L2_0>;
538 };
539 CPU22: cpu@106 {
540 device_type = "cpu";
541 compatible = "cavium,thunder", "arm,armv8";
542 reg = <0x0 0x106>;
543 enable-method = "psci";
544 numa-node-id = <0>;
545 next-level-cache = <&thunderx_L2_0>;
546 };
547 CPU23: cpu@107 {
548 device_type = "cpu";
549 compatible = "cavium,thunder", "arm,armv8";
550 reg = <0x0 0x107>;
551 enable-method = "psci";
552 numa-node-id = <0>;
553 next-level-cache = <&thunderx_L2_0>;
554 };
555 CPU24: cpu@108 {
556 device_type = "cpu";
557 compatible = "cavium,thunder", "arm,armv8";
558 reg = <0x0 0x108>;
559 enable-method = "psci";
560 numa-node-id = <0>;
561 next-level-cache = <&thunderx_L2_0>;
562 };
563 CPU25: cpu@109 {
564 device_type = "cpu";
565 compatible = "cavium,thunder", "arm,armv8";
566 reg = <0x0 0x109>;
567 enable-method = "psci";
568 numa-node-id = <0>;
569 next-level-cache = <&thunderx_L2_0>;
570 };
571 CPU26: cpu@10a {
572 device_type = "cpu";
573 compatible = "cavium,thunder", "arm,armv8";
574 reg = <0x0 0x10a>;
575 enable-method = "psci";
576 numa-node-id = <0>;
577 next-level-cache = <&thunderx_L2_0>;
578 };
579 CPU27: cpu@10b {
580 device_type = "cpu";
581 compatible = "cavium,thunder", "arm,armv8";
582 reg = <0x0 0x10b>;
583 enable-method = "psci";
584 numa-node-id = <0>;
585 next-level-cache = <&thunderx_L2_0>;
586 };
587 CPU28: cpu@10c {
588 device_type = "cpu";
589 compatible = "cavium,thunder", "arm,armv8";
590 reg = <0x0 0x10c>;
591 enable-method = "psci";
592 numa-node-id = <0>;
593 next-level-cache = <&thunderx_L2_0>;
594 };
595 CPU29: cpu@10d {
596 device_type = "cpu";
597 compatible = "cavium,thunder", "arm,armv8";
598 reg = <0x0 0x10d>;
599 enable-method = "psci";
600 numa-node-id = <0>;
601 next-level-cache = <&thunderx_L2_0>;
602 };
603 CPU30: cpu@10e {
604 device_type = "cpu";
605 compatible = "cavium,thunder", "arm,armv8";
606 reg = <0x0 0x10e>;
607 enable-method = "psci";
608 numa-node-id = <0>;
609 next-level-cache = <&thunderx_L2_0>;
610 };
611 CPU31: cpu@10f {
612 device_type = "cpu";
613 compatible = "cavium,thunder", "arm,armv8";
614 reg = <0x0 0x10f>;
615 enable-method = "psci";
616 numa-node-id = <0>;
617 next-level-cache = <&thunderx_L2_0>;
618 };
619 CPU32: cpu@200 {
620 device_type = "cpu";
621 compatible = "cavium,thunder", "arm,armv8";
622 reg = <0x0 0x200>;
623 enable-method = "psci";
624 numa-node-id = <0>;
625 next-level-cache = <&thunderx_L2_0>;
626 };
627 CPU33: cpu@201 {
628 device_type = "cpu";
629 compatible = "cavium,thunder", "arm,armv8";
630 reg = <0x0 0x201>;
631 enable-method = "psci";
632 numa-node-id = <0>;
633 next-level-cache = <&thunderx_L2_0>;
634 };
635 CPU34: cpu@202 {
636 device_type = "cpu";
637 compatible = "cavium,thunder", "arm,armv8";
638 reg = <0x0 0x202>;
639 enable-method = "psci";
640 numa-node-id = <0>;
641 next-level-cache = <&thunderx_L2_0>;
642 };
643 CPU35: cpu@203 {
644 device_type = "cpu";
645 compatible = "cavium,thunder", "arm,armv8";
646 reg = <0x0 0x203>;
647 enable-method = "psci";
648 numa-node-id = <0>;
649 next-level-cache = <&thunderx_L2_0>;
650 };
651 CPU36: cpu@204 {
652 device_type = "cpu";
653 compatible = "cavium,thunder", "arm,armv8";
654 reg = <0x0 0x204>;
655 enable-method = "psci";
656 numa-node-id = <0>;
657 next-level-cache = <&thunderx_L2_0>;
658 };
659 CPU37: cpu@205 {
660 device_type = "cpu";
661 compatible = "cavium,thunder", "arm,armv8";
662 reg = <0x0 0x205>;
663 enable-method = "psci";
664 numa-node-id = <0>;
665 next-level-cache = <&thunderx_L2_0>;
666 };
667 CPU38: cpu@206 {
668 device_type = "cpu";
669 compatible = "cavium,thunder", "arm,armv8";
670 reg = <0x0 0x206>;
671 enable-method = "psci";
672 numa-node-id = <0>;
673 next-level-cache = <&thunderx_L2_0>;
674 };
675 CPU39: cpu@207 {
676 device_type = "cpu";
677 compatible = "cavium,thunder", "arm,armv8";
678 reg = <0x0 0x207>;
679 enable-method = "psci";
680 numa-node-id = <0>;
681 next-level-cache = <&thunderx_L2_0>;
682 };
683 CPU40: cpu@208 {
684 device_type = "cpu";
685 compatible = "cavium,thunder", "arm,armv8";
686 reg = <0x0 0x208>;
687 enable-method = "psci";
688 numa-node-id = <0>;
689 next-level-cache = <&thunderx_L2_0>;
690 };
691 CPU41: cpu@209 {
692 device_type = "cpu";
693 compatible = "cavium,thunder", "arm,armv8";
694 reg = <0x0 0x209>;
695 enable-method = "psci";
696 numa-node-id = <0>;
697 next-level-cache = <&thunderx_L2_0>;
698 };
699 CPU42: cpu@20a {
700 device_type = "cpu";
701 compatible = "cavium,thunder", "arm,armv8";
702 reg = <0x0 0x20a>;
703 enable-method = "psci";
704 numa-node-id = <0>;
705 next-level-cache = <&thunderx_L2_0>;
706 };
707 CPU43: cpu@20b {
708 device_type = "cpu";
709 compatible = "cavium,thunder", "arm,armv8";
710 reg = <0x0 0x20b>;
711 enable-method = "psci";
712 numa-node-id = <0>;
713 next-level-cache = <&thunderx_L2_0>;
714 };
715 CPU44: cpu@20c {
716 device_type = "cpu";
717 compatible = "cavium,thunder", "arm,armv8";
718 reg = <0x0 0x20c>;
719 enable-method = "psci";
720 numa-node-id = <0>;
721 next-level-cache = <&thunderx_L2_0>;
722 };
723 CPU45: cpu@20d {
724 device_type = "cpu";
725 compatible = "cavium,thunder", "arm,armv8";
726 reg = <0x0 0x20d>;
727 enable-method = "psci";
728 numa-node-id = <0>;
729 next-level-cache = <&thunderx_L2_0>;
730 };
731 CPU46: cpu@20e {
732 device_type = "cpu";
733 compatible = "cavium,thunder", "arm,armv8";
734 reg = <0x0 0x20e>;
735 enable-method = "psci";
736 numa-node-id = <0>;
737 next-level-cache = <&thunderx_L2_0>;
738 };
739 CPU47: cpu@20f {
740 device_type = "cpu";
741 compatible = "cavium,thunder", "arm,armv8";
742 reg = <0x0 0x20f>;
743 enable-method = "psci";
744 numa-node-id = <0>;
745 next-level-cache = <&thunderx_L2_0>;
746 };
747 CPU48: cpu@10000 {
748 device_type = "cpu";
749 compatible = "cavium,thunder", "arm,armv8";
750 reg = <0x0 0x10000>;
751 enable-method = "psci";
752 /* socket 1 */
753 numa-node-id = <1>;
754 next-level-cache = <&thunderx_L2_1>;
755 };
756 CPU49: cpu@10001 {
757 device_type = "cpu";
758 compatible = "cavium,thunder", "arm,armv8";
759 reg = <0x0 0x10001>;
760 enable-method = "psci";
761 numa-node-id = <1>;
762 next-level-cache = <&thunderx_L2_1>;
763 };
764 CPU50: cpu@10002 {
765 device_type = "cpu";
766 compatible = "cavium,thunder", "arm,armv8";
767 reg = <0x0 0x10002>;
768 enable-method = "psci";
769 numa-node-id = <1>;
770 next-level-cache = <&thunderx_L2_1>;
771 };
772 CPU51: cpu@10003 {
773 device_type = "cpu";
774 compatible = "cavium,thunder", "arm,armv8";
775 reg = <0x0 0x10003>;
776 enable-method = "psci";
777 numa-node-id = <1>;
778 next-level-cache = <&thunderx_L2_1>;
779 };
780 CPU52: cpu@10004 {
781 device_type = "cpu";
782 compatible = "cavium,thunder", "arm,armv8";
783 reg = <0x0 0x10004>;
784 enable-method = "psci";
785 numa-node-id = <1>;
786 next-level-cache = <&thunderx_L2_1>;
787 };
788 CPU53: cpu@10005 {
789 device_type = "cpu";
790 compatible = "cavium,thunder", "arm,armv8";
791 reg = <0x0 0x10005>;
792 enable-method = "psci";
793 numa-node-id = <1>;
794 next-level-cache = <&thunderx_L2_1>;
795 };
796 CPU54: cpu@10006 {
797 device_type = "cpu";
798 compatible = "cavium,thunder", "arm,armv8";
799 reg = <0x0 0x10006>;
800 enable-method = "psci";
801 numa-node-id = <1>;
802 next-level-cache = <&thunderx_L2_1>;
803 };
804 CPU55: cpu@10007 {
805 device_type = "cpu";
806 compatible = "cavium,thunder", "arm,armv8";
807 reg = <0x0 0x10007>;
808 enable-method = "psci";
809 numa-node-id = <1>;
810 next-level-cache = <&thunderx_L2_1>;
811 };
812 CPU56: cpu@10008 {
813 device_type = "cpu";
814 compatible = "cavium,thunder", "arm,armv8";
815 reg = <0x0 0x10008>;
816 enable-method = "psci";
817 numa-node-id = <1>;
818 next-level-cache = <&thunderx_L2_1>;
819 };
820 CPU57: cpu@10009 {
821 device_type = "cpu";
822 compatible = "cavium,thunder", "arm,armv8";
823 reg = <0x0 0x10009>;
824 enable-method = "psci";
825 numa-node-id = <1>;
826 next-level-cache = <&thunderx_L2_1>;
827 };
828 CPU58: cpu@1000a {
829 device_type = "cpu";
830 compatible = "cavium,thunder", "arm,armv8";
831 reg = <0x0 0x1000a>;
832 enable-method = "psci";
833 numa-node-id = <1>;
834 next-level-cache = <&thunderx_L2_1>;
835 };
836 CPU59: cpu@1000b {
837 device_type = "cpu";
838 compatible = "cavium,thunder", "arm,armv8";
839 reg = <0x0 0x1000b>;
840 enable-method = "psci";
841 numa-node-id = <1>;
842 next-level-cache = <&thunderx_L2_1>;
843 };
844 CPU60: cpu@1000c {
845 device_type = "cpu";
846 compatible = "cavium,thunder", "arm,armv8";
847 reg = <0x0 0x1000c>;
848 enable-method = "psci";
849 numa-node-id = <1>;
850 next-level-cache = <&thunderx_L2_1>;
851 };
852 CPU61: cpu@1000d {
853 device_type = "cpu";
854 compatible = "cavium,thunder", "arm,armv8";
855 reg = <0x0 0x1000d>;
856 enable-method = "psci";
857 numa-node-id = <1>;
858 next-level-cache = <&thunderx_L2_1>;
859 };
860 CPU62: cpu@1000e {
861 device_type = "cpu";
862 compatible = "cavium,thunder", "arm,armv8";
863 reg = <0x0 0x1000e>;
864 enable-method = "psci";
865 numa-node-id = <1>;
866 next-level-cache = <&thunderx_L2_1>;
867 };
868 CPU63: cpu@1000f {
869 device_type = "cpu";
870 compatible = "cavium,thunder", "arm,armv8";
871 reg = <0x0 0x1000f>;
872 enable-method = "psci";
873 numa-node-id = <1>;
874 next-level-cache = <&thunderx_L2_1>;
875 };
876 CPU64: cpu@10100 {
877 device_type = "cpu";
878 compatible = "cavium,thunder", "arm,armv8";
879 reg = <0x0 0x10100>;
880 enable-method = "psci";
881 numa-node-id = <1>;
882 next-level-cache = <&thunderx_L2_1>;
883 };
884 CPU65: cpu@10101 {
885 device_type = "cpu";
886 compatible = "cavium,thunder", "arm,armv8";
887 reg = <0x0 0x10101>;
888 enable-method = "psci";
889 numa-node-id = <1>;
890 next-level-cache = <&thunderx_L2_1>;
891 };
892 CPU66: cpu@10102 {
893 device_type = "cpu";
894 compatible = "cavium,thunder", "arm,armv8";
895 reg = <0x0 0x10102>;
896 enable-method = "psci";
897 numa-node-id = <1>;
898 next-level-cache = <&thunderx_L2_1>;
899 };
900 CPU67: cpu@10103 {
901 device_type = "cpu";
902 compatible = "cavium,thunder", "arm,armv8";
903 reg = <0x0 0x10103>;
904 enable-method = "psci";
905 numa-node-id = <1>;
906 next-level-cache = <&thunderx_L2_1>;
907 };
908 CPU68: cpu@10104 {
909 device_type = "cpu";
910 compatible = "cavium,thunder", "arm,armv8";
911 reg = <0x0 0x10104>;
912 enable-method = "psci";
913 numa-node-id = <1>;
914 next-level-cache = <&thunderx_L2_1>;
915 };
916 CPU69: cpu@10105 {
917 device_type = "cpu";
918 compatible = "cavium,thunder", "arm,armv8";
919 reg = <0x0 0x10105>;
920 enable-method = "psci";
921 numa-node-id = <1>;
922 next-level-cache = <&thunderx_L2_1>;
923 };
924 CPU70: cpu@10106 {
925 device_type = "cpu";
926 compatible = "cavium,thunder", "arm,armv8";
927 reg = <0x0 0x10106>;
928 enable-method = "psci";
929 numa-node-id = <1>;
930 next-level-cache = <&thunderx_L2_1>;
931 };
932 CPU71: cpu@10107 {
933 device_type = "cpu";
934 compatible = "cavium,thunder", "arm,armv8";
935 reg = <0x0 0x10107>;
936 enable-method = "psci";
937 numa-node-id = <1>;
938 next-level-cache = <&thunderx_L2_1>;
939 };
940 CPU72: cpu@10108 {
941 device_type = "cpu";
942 compatible = "cavium,thunder", "arm,armv8";
943 reg = <0x0 0x10108>;
944 enable-method = "psci";
945 numa-node-id = <1>;
946 next-level-cache = <&thunderx_L2_1>;
947 };
948 CPU73: cpu@10109 {
949 device_type = "cpu";
950 compatible = "cavium,thunder", "arm,armv8";
951 reg = <0x0 0x10109>;
952 enable-method = "psci";
953 numa-node-id = <1>;
954 next-level-cache = <&thunderx_L2_1>;
955 };
956 CPU74: cpu@1010a {
957 device_type = "cpu";
958 compatible = "cavium,thunder", "arm,armv8";
959 reg = <0x0 0x1010a>;
960 enable-method = "psci";
961 numa-node-id = <1>;
962 next-level-cache = <&thunderx_L2_1>;
963 };
964 CPU75: cpu@1010b {
965 device_type = "cpu";
966 compatible = "cavium,thunder", "arm,armv8";
967 reg = <0x0 0x1010b>;
968 enable-method = "psci";
969 numa-node-id = <1>;
970 next-level-cache = <&thunderx_L2_1>;
971 };
972 CPU76: cpu@1010c {
973 device_type = "cpu";
974 compatible = "cavium,thunder", "arm,armv8";
975 reg = <0x0 0x1010c>;
976 enable-method = "psci";
977 numa-node-id = <1>;
978 next-level-cache = <&thunderx_L2_1>;
979 };
980 CPU77: cpu@1010d {
981 device_type = "cpu";
982 compatible = "cavium,thunder", "arm,armv8";
983 reg = <0x0 0x1010d>;
984 enable-method = "psci";
985 numa-node-id = <1>;
986 next-level-cache = <&thunderx_L2_1>;
987 };
988 CPU78: cpu@1010e {
989 device_type = "cpu";
990 compatible = "cavium,thunder", "arm,armv8";
991 reg = <0x0 0x1010e>;
992 enable-method = "psci";
993 numa-node-id = <1>;
994 next-level-cache = <&thunderx_L2_1>;
995 };
996 CPU79: cpu@1010f {
997 device_type = "cpu";
998 compatible = "cavium,thunder", "arm,armv8";
999 reg = <0x0 0x1010f>;
1000 enable-method = "psci";
1001 numa-node-id = <1>;
1002 next-level-cache = <&thunderx_L2_1>;
1003 };
1004 CPU80: cpu@10200 {
1005 device_type = "cpu";
1006 compatible = "cavium,thunder", "arm,armv8";
1007 reg = <0x0 0x10200>;
1008 enable-method = "psci";
1009 numa-node-id = <1>;
1010 next-level-cache = <&thunderx_L2_1>;
1011 };
1012 CPU81: cpu@10201 {
1013 device_type = "cpu";
1014 compatible = "cavium,thunder", "arm,armv8";
1015 reg = <0x0 0x10201>;
1016 enable-method = "psci";
1017 numa-node-id = <1>;
1018 next-level-cache = <&thunderx_L2_1>;
1019 };
1020 CPU82: cpu@10202 {
1021 device_type = "cpu";
1022 compatible = "cavium,thunder", "arm,armv8";
1023 reg = <0x0 0x10202>;
1024 enable-method = "psci";
1025 numa-node-id = <1>;
1026 next-level-cache = <&thunderx_L2_1>;
1027 };
1028 CPU83: cpu@10203 {
1029 device_type = "cpu";
1030 compatible = "cavium,thunder", "arm,armv8";
1031 reg = <0x0 0x10203>;
1032 enable-method = "psci";
1033 numa-node-id = <1>;
1034 next-level-cache = <&thunderx_L2_1>;
1035 };
1036 CPU84: cpu@10204 {
1037 device_type = "cpu";
1038 compatible = "cavium,thunder", "arm,armv8";
1039 reg = <0x0 0x10204>;
1040 enable-method = "psci";
1041 numa-node-id = <1>;
1042 next-level-cache = <&thunderx_L2_1>;
1043 };
1044 CPU85: cpu@10205 {
1045 device_type = "cpu";
1046 compatible = "cavium,thunder", "arm,armv8";
1047 reg = <0x0 0x10205>;
1048 enable-method = "psci";
1049 numa-node-id = <1>;
1050 next-level-cache = <&thunderx_L2_1>;
1051 };
1052 CPU86: cpu@10206 {
1053 device_type = "cpu";
1054 compatible = "cavium,thunder", "arm,armv8";
1055 reg = <0x0 0x10206>;
1056 enable-method = "psci";
1057 numa-node-id = <1>;
1058 next-level-cache = <&thunderx_L2_1>;
1059 };
1060 CPU87: cpu@10207 {
1061 device_type = "cpu";
1062 compatible = "cavium,thunder", "arm,armv8";
1063 reg = <0x0 0x10207>;
1064 enable-method = "psci";
1065 numa-node-id = <1>;
1066 next-level-cache = <&thunderx_L2_1>;
1067 };
1068 CPU88: cpu@10208 {
1069 device_type = "cpu";
1070 compatible = "cavium,thunder", "arm,armv8";
1071 reg = <0x0 0x10208>;
1072 enable-method = "psci";
1073 numa-node-id = <1>;
1074 next-level-cache = <&thunderx_L2_1>;
1075 };
1076 CPU89: cpu@10209 {
1077 device_type = "cpu";
1078 compatible = "cavium,thunder", "arm,armv8";
1079 reg = <0x0 0x10209>;
1080 enable-method = "psci";
1081 numa-node-id = <1>;
1082 next-level-cache = <&thunderx_L2_1>;
1083 };
1084 CPU90: cpu@1020a {
1085 device_type = "cpu";
1086 compatible = "cavium,thunder", "arm,armv8";
1087 reg = <0x0 0x1020a>;
1088 enable-method = "psci";
1089 numa-node-id = <1>;
1090 next-level-cache = <&thunderx_L2_1>;
1091 };
1092 CPU91: cpu@1020b {
1093 device_type = "cpu";
1094 compatible = "cavium,thunder", "arm,armv8";
1095 reg = <0x0 0x1020b>;
1096 enable-method = "psci";
1097 numa-node-id = <1>;
1098 next-level-cache = <&thunderx_L2_1>;
1099 };
1100 CPU92: cpu@1020c {
1101 device_type = "cpu";
1102 compatible = "cavium,thunder", "arm,armv8";
1103 reg = <0x0 0x1020c>;
1104 enable-method = "psci";
1105 numa-node-id = <1>;
1106 next-level-cache = <&thunderx_L2_1>;
1107 };
1108 CPU93: cpu@1020d {
1109 device_type = "cpu";
1110 compatible = "cavium,thunder", "arm,armv8";
1111 reg = <0x0 0x1020d>;
1112 enable-method = "psci";
1113 numa-node-id = <1>;
1114 next-level-cache = <&thunderx_L2_1>;
1115 };
1116 CPU94: cpu@1020e {
1117 device_type = "cpu";
1118 compatible = "cavium,thunder", "arm,armv8";
1119 reg = <0x0 0x1020e>;
1120 enable-method = "psci";
1121 numa-node-id = <1>;
1122 next-level-cache = <&thunderx_L2_1>;
1123 };
1124 CPU95: cpu@1020f {
1125 device_type = "cpu";
1126 compatible = "cavium,thunder", "arm,armv8";
1127 reg = <0x0 0x1020f>;
1128 enable-method = "psci";
1129 numa-node-id = <1>;
1130 next-level-cache = <&thunderx_L2_1>;
1131 };
1132 thunderx_L2_0: l2-cache0 {
1133 compatible = "cache";
1134 numa-node-id = <0>;
1135 };
1136 thunderx_L2_1: l2-cache1 {
1137 compatible = "cache";
1138 numa-node-id = <1>;
1139 };
1140 };
1141
1142 timer {
1143 compatible = "arm,armv8-timer";
1144 interrupts = <1 13 4>,
1145 <1 14 4>,
1146 <1 11 4>,
1147 <1 10 4>;
1148 };
1149
1150 pmu {
1151 compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
1152 interrupts = <1 7 4>;
1153 };
1154
1155 gic0: interrupt-controller@801000000000 {
1156 compatible = "arm,gic-v3";
1157 #interrupt-cells = <3>;
1158 #address-cells = <2>;
1159 #size-cells = <2>;
1160 #redistributor-regions = <2>;
1161 ranges;
1162 interrupt-controller;
1163 reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
1164 <0x8010 0x80000000 0x0 0x600000>, /* GICR Node 0 */
1165 <0x9010 0x80000000 0x0 0x600000>; /* GICR Node 1 */
1166 interrupts = <1 9 4>;
1167
1168 its: gic-its@801000020000 {
1169 compatible = "arm,gic-v3-its";
1170 reg = <0x8010 0x20000 0x0 0x200000>;
1171 msi-controller;
1172 numa-node-id = <0>;
1173 };
1174
1175 its1: gic-its@901000020000 {
1176 compatible = "arm,gic-v3-its";
1177 reg = <0x9010 0x20000 0x0 0x200000>;
1178 msi-controller;
1179 numa-node-id = <1>;
1180 };
1181 };
1182
1183 soc@0 {
1184 compatible = "simple-bus";
1185 #address-cells = <2>;
1186 #size-cells = <2>;
1187 ranges;
1188 numa-node-id = <0>;
1189
1190 gpio-keys {
1191 compatible = "gpio-keys";
1192 button@1 {
1193 lable = "GPIO Key Power";
1194 /* 116 is the value of KEY_POWER, which
1195 is defined in include/uapi/linux/input.h
1196 of Linux kernel code */
1197 linux,code = <116>;
1198 /* Interrupt type: SPI;
1199 Interrupt nunmber: 0, which corresponds to
1200 KEY_POWER_IRQ definition in
1201 plat/thunder/include/thunder_io.h of ATF code;
1202 Flag: 1, edge triggered */
1203 interrupts = <0 0 1>;
1204 };
1205 };
1206
1207 refclkuaa: refclkuaa {
1208 compatible = "fixed-clock";
1209 #clock-cells = <0>;
1210 clock-frequency = <116640000>;
1211 clock-output-names = "refclkuaa";
1212 };
1213
1214 sclk: sclk {
1215 compatible = "fixed-clock";
1216 #clock-cells = <0>;
1217 clock-frequency = <800000000>;
1218 clock-output-names = "sclk";
1219 };
1220
1221 uaa0: serial@87e024000000 {
1222 compatible = "arm,pl011", "arm,primecell";
1223 reg = <0x87e0 0x24000000 0x0 0x1000>;
1224 interrupts = <0 5 4>;
1225 clocks = <&refclkuaa>;
1226 clock-names = "apb_pclk";
1227 };
1228
1229 uaa1: serial@87e025000000 {
1230 compatible = "arm,pl011", "arm,primecell";
1231 reg = <0x87e0 0x25000000 0x0 0x1000>;
1232 interrupts = <0 6 4>;
1233 clocks = <&refclkuaa>;
1234 clock-names = "apb_pclk";
1235 };
1236
1237 smmu0@830000000000 {
1238 compatible = "cavium,smmu-v2";
1239 reg = <0x8300 0x0 0x0 0x2000000>;
1240 #global-interrupts = <1>;
1241 interrupts = <0 68 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1242 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1243 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1244 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1245 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1246 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1247 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1248 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1249 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1250 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1251 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1252 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1253 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1254 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1255 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1256 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1257 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1258 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1259 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1260 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1261 <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>, <0 69 4>,
1262 <0 69 4>, <0 69 4>, <0 69 4>;
1263
1264 mmu-masters = <&ecam0 0x100>;
1265 };
1266
1267 smmu1@831000000000 {
1268 compatible = "cavium,smmu-v2";
1269 reg = <0x8310 0x0 0x0 0x2000000>;
1270 #global-interrupts = <1>;
1271 interrupts = <0 70 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1272 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1273 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1274 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1275 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1276 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1277 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1278 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1279 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1280 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1281 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1282 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1283 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1284 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1285 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1286 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1287 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1288 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1289 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1290 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1291 <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>, <0 71 4>,
1292 <0 71 4>, <0 71 4>, <0 71 4>;
1293
1294 mmu-masters = <&ecam1 0x100>,
1295 <&pem0 0x200>,
1296 <&pem1 0x300>,
1297 <&pem2 0x400>;
1298 };
1299
1300 smmu2@832000000000 {
1301 compatible = "cavium,smmu-v2";
1302 reg = <0x8320 0x0 0x0 0x2000000>;
1303 #global-interrupts = <1>;
1304 interrupts = <0 72 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1305 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1306 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1307 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1308 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1309 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1310 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1311 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1312 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1313 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1314 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1315 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1316 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1317 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1318 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1319 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1320 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1321 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1322 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1323 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1324 <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>, <0 73 4>,
1325 <0 73 4>, <0 73 4>, <0 73 4>;
1326
1327 mmu-masters = <&ecam2 0x100>;
1328 };
1329
1330 smmu3@833000000000 {
1331 compatible = "cavium,smmu-v2";
1332 reg = <0x8330 0x0 0x0 0x2000000>;
1333 #global-interrupts = <1>;
1334 interrupts = <0 74 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1335 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1336 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1337 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1338 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1339 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1340 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1341 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1342 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1343 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1344 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1345 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1346 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1347 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1348 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1349 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1350 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1351 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1352 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1353 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1354 <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>, <0 75 4>,
1355 <0 75 4>, <0 75 4>, <0 75 4>;
1356
1357 mmu-masters = <&ecam3 0x100>,
1358 <&pem3 0x200>,
1359 <&pem4 0x300>,
1360 <&pem5 0x400>;
1361 };
1362
1363 ecam0: pci@848000000000 {
1364 compatible = "cavium,pci-host-thunder-ecam";
1365 device_type = "pci";
1366 msi-parent = <&its>;
1367 msi-map = <0 &its 0 0x10000>;
1368 bus-range = <0 31>;
1369 #size-cells = <2>;
1370 #address-cells = <3>;
1371 #stream-id-cells = <1>;
1372 dma-coherent;
1373 reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */
1374 ranges = <0x03000000 0x8020 0x00000000 0x8020 0x00000000 0x060 0x00000000>, /* mem ranges */
1375 <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x0a0 0x00000000>, /* ZIP et al. */
1376 <0x03000000 0x8460 0x00000000 0x8460 0x00000000 0x020 0x00000000>, /* DFA et al. */
1377 <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x24000000>, /* hole for UARTs */
1378 <0x03000000 0x87e0 0x26000000 0x87e0 0x26000000 0x000 0x9a000000>, /* hole for PEMs */
1379 <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>;
1380
1381 mrml-bridge@1,0 {
1382 compatible = "cavium,thunder-8890-mrml-bridge";
1383 device_type = "pci";
1384 #size-cells = <2>;
1385 #address-cells = <3>;
1386 ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>;
1387 reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */
1388
1389 mdio-nexus@1,3 {
1390 compatible = "cavium,thunder-8890-mdio-nexus";
1391 #address-cells = <2>;
1392 #size-cells = <2>;
1393 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
1394 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
1395 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
1396
1397 mdio@87e005003800 {
1398 compatible = "cavium,thunder-8890-mdio";
1399 #address-cells = <1>;
1400 #size-cells = <0>;
1401 reg = <0x87e0 0x05003800 0x0 0x30>;
1402
1403 xfi00: xfi@0 {
1404 qlm-mode = "0x000,xfi","0x000,xfi-10g-kr";
1405 reg = <0> ;
1406 compatible = "cortina,cs4223-slice";
1407 };
1408 xfi01: xfi@1 {
1409 qlm-mode = "0x001,xfi","0x001,xfi-10g-kr";
1410 reg = <1> ;
1411 compatible = "cortina,cs4223-slice";
1412 };
1413 xfi02: xfi@2 {
1414 qlm-mode = "0x002,xfi","0x002,xfi-10g-kr";
1415 reg = <2> ;
1416 compatible = "cortina,cs4223-slice";
1417 };
1418 xfi03: xfi@3 {
1419 qlm-mode = "0x003,xfi","0x003,xfi-10g-kr";
1420 reg = <3> ;
1421 compatible = "cortina,cs4223-slice";
1422 };
1423 xlaui00: xlaui@0 {
1424 qlm-mode = "0x000,xlaui","0x000,xlaui-40g-kr";
1425 reg = <0> ;
1426 compatible = "cortina,cs4223-slice";
1427 };
1428 };
1429
1430 mdio@87e005003880 {
1431 compatible = "cavium,thunder-8890-mdio";
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1434 reg = <0x87e0 0x05003880 0x0 0x30>;
1435
1436 xfi10: xfi@0 {
1437 qlm-mode = "0x010,xfi","0x010,xfi-10g-kr";
1438 reg = <0> ;
1439 compatible = "cortina,cs4223-slice";
1440 };
1441 xfi11: xfi@1 {
1442 qlm-mode = "0x011,xfi","0x011,xfi-10g-kr";
1443 reg = <1> ;
1444 compatible = "cortina,cs4223-slice";
1445 };
1446 xfi12: xfi@2 {
1447 qlm-mode = "0x012,xfi","0x012,xfi-10g-kr";
1448 reg = <2> ;
1449 compatible = "cortina,cs4223-slice";
1450 };
1451 xfi13: xfi@3 {
1452 qlm-mode = "0x013,xfi","0x013,xfi-10g-kr";
1453 reg = <3> ;
1454 compatible = "cortina,cs4223-slice";
1455 };
1456 xlaui10: xlaui@0 {
1457 qlm-mode = "0x010,xlaui","0x010,xlaui-40g-kr";
1458 reg = <0> ;
1459 compatible = "cortina,cs4223-slice";
1460 };
1461 };
1462 };
1463
1464// I2C configuration for EBB8800 testing
1465// i2c@9,0 {
1466// #address-cells = <1>;
1467// #size-cells = <0>;
1468// compatible = "cavium,thunder-8890-twsi";
1469// reg = <0x4800 0 0 0 0>; /* DEVFN = 0x48 (9:0) */
1470// clock-frequency = <100000>;
1471// clocks = <&sclk>;
1472//
1473// rtc@68 {
1474// compatible = "dallas,ds1337";
1475// reg = <0x68>;
1476// };
1477// };
1478//
1479 bgx0 {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1482 reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */
1483 /* typename+qlm+typenumber eg :
1484 sgmii+bgx0+sgmmi0
1485 */
1486 // SGMII
1487 sgmii@0 {
1488 reg = <0>;
1489 qlm-mode = "0x000,sgmii";
1490 local-mac-address = [ 00 00 00 00 00 00 ];
1491 phy-handle = <&sgmii00>;
1492 };
1493 sgmii@1 {
1494 reg = <1>;
1495 qlm-mode = "0x001,sgmii";
1496 local-mac-address = [ 00 00 00 00 00 00 ];
1497 phy-handle = <&sgmii01>;
1498 };
1499 sgmii@2 {
1500 reg = <2>;
1501 qlm-mode = "0x002,sgmii";
1502 local-mac-address = [ 00 00 00 00 00 00 ];
1503 phy-handle = <&sgmii02>;
1504 };
1505 sgmii@3 {
1506 reg = <3>;
1507 qlm-mode = "0x003,sgmii";
1508 local-mac-address = [ 00 00 00 00 00 00 ];
1509 phy-handle = <&sgmii03>;
1510 };
1511 xfi@0 {
1512 reg = <0>;
1513 qlm-mode = "0x000,xfi";
1514 local-mac-address = [ 00 00 00 00 00 00 ];
1515 phy-handle = <&xfi00>;
1516 };
1517 xfi@1 {
1518 reg = <1>;
1519 qlm-mode = "0x001,xfi";
1520 local-mac-address = [ 00 00 00 00 00 00 ];
1521 phy-handle = <&xfi01>;
1522 };
1523 xfi@2 {
1524 reg = <2>;
1525 qlm-mode = "0x002,xfi";
1526 local-mac-address = [ 00 00 00 00 00 00 ];
1527 phy-handle = <&xfi02>;
1528 };
1529 xfi@3 {
1530 reg = <3>;
1531 qlm-mode = "0x003,xfi";
1532 local-mac-address = [ 00 00 00 00 00 00 ];
1533 phy-handle = <&xfi03>;
1534 };
1535 // 10g-kr
1536 xfi-10g-kr@0 {
1537 reg = <0>;
1538 qlm-mode = "0x000,xfi-10g-kr";
1539 local-mac-address = [ 00 00 00 00 00 00 ];
1540 phy-handle = <&xfi00>;
1541 };
1542 xfi-10g-kr@1 {
1543 reg = <1>;
1544 qlm-mode = "0x001,xfi-10g-kr";
1545 local-mac-address = [ 00 00 00 00 00 00 ];
1546 phy-handle = <&xfi01>;
1547 };
1548 xfi-10g-kr@2 {
1549 reg = <2>;
1550 qlm-mode = "0x002,xfi-10g-kr";
1551 local-mac-address = [ 00 00 00 00 00 00 ];
1552 phy-handle = <&xfi02>;
1553 };
1554 xfi-10g-kr@3 {
1555 reg = <3>;
1556 qlm-mode = "0x003,xfi-10g-kr";
1557 local-mac-address = [ 00 00 00 00 00 00 ];
1558 phy-handle = <&xfi03>;
1559 };
1560 xlaui@0 {
1561 reg = <0>;
1562 qlm-mode = "0x000,xlaui";
1563 local-mac-address = [ 00 00 00 00 00 00 ];
1564 phy-handle = <&xlaui00>;
1565 };
1566 xlaui-40g-kr@0 {
1567 reg = <0>;
1568 qlm-mode = "0x000,xlaui-40g-kr";
1569 local-mac-address = [ 00 00 00 00 00 00 ];
1570 phy-handle = <&xlaui00>;
1571 };
1572 xaui@0 {
1573 reg = <0>;
1574 qlm-mode = "0x000,xaui";
1575 local-mac-address = [ 00 00 00 00 00 00 ];
1576 phy-handle = <&xaui00>;
1577 };
1578 rxaui@0 {
1579 reg = <0>;
1580 qlm-mode = "0x000,rxaui";
1581 local-mac-address = [ 00 00 00 00 00 00 ];
1582 phy-handle = <&rxaui00>;
1583 };
1584 rxaui@2 {
1585 reg = <2>;
1586 qlm-mode = "0x002,rxaui";
1587 local-mac-address = [ 00 00 00 00 00 00 ];
1588 phy-handle = <&rxaui02>;
1589 };
1590 };
1591
1592 bgx1 {
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595 reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */
1596
1597 sgmii@0 {
1598 reg = <0>;
1599 qlm-mode = "0x010,sgmii";
1600 local-mac-address = [ 00 00 00 00 00 00 ];
1601 phy-handle = <&sgmii10>; /*"sgmmi"+bgx+no */
1602 };
1603 sgmii@1 {
1604 reg = <1>;
1605 qlm-mode = "0x011,sgmii";
1606 local-mac-address = [ 00 00 00 00 00 00 ];
1607 phy-handle = <&sgmii11>;
1608 };
1609 sgmii@2 {
1610 reg = <2>;
1611 qlm-mode = "0x012,sgmii";
1612 local-mac-address = [ 00 00 00 00 00 00 ];
1613 phy-handle = <&sgmii12>;
1614 };
1615 sgmii@3 {
1616 reg = <3>;
1617 qlm-mode = "0x013,sgmii";
1618 local-mac-address = [ 00 00 00 00 00 00 ];
1619 phy-handle = <&sgmii13>;
1620 };
1621 xfi@0 {
1622 reg = <0>;
1623 qlm-mode = "0x010,xfi";
1624 local-mac-address = [ 00 00 00 00 00 00 ];
1625 phy-handle = <&xfi10>;
1626 };
1627 xfi@1 {
1628 reg = <1>;
1629 qlm-mode = "0x011,xfi";
1630 local-mac-address = [ 00 00 00 00 00 00 ];
1631 phy-handle = <&xfi11>;
1632 };
1633 xfi@2 {
1634 reg = <2>;
1635 qlm-mode = "0x012,xfi";
1636 local-mac-address = [ 00 00 00 00 00 00 ];
1637 phy-handle = <&xfi12>;
1638 };
1639 xfi@3 {
1640 reg = <3>;
1641 qlm-mode = "0x013,xfi";
1642 local-mac-address = [ 00 00 00 00 00 00 ];
1643 phy-handle = <&xfi13>;
1644 };
1645 // 10g_kr
1646 xfi-10g-kr@0 {
1647 reg = <0>;
1648 qlm-mode = "0x010,xfi-10g-kr";
1649 local-mac-address = [ 00 00 00 00 00 00 ];
1650 phy-handle = <&xfi10>;
1651 };
1652 xfi-10g-kr@1 {
1653 reg = <1>;
1654 qlm-mode = "0x011,xfi-10g-kr";
1655 local-mac-address = [ 00 00 00 00 00 00 ];
1656 phy-handle = <&xfi11>;
1657 };
1658 xfi-10g-kr@2 {
1659 reg = <2>;
1660 qlm-mode = "0x012,xfi-10g-kr";
1661 local-mac-address = [ 00 00 00 00 00 00 ];
1662 phy-handle = <&xfi12>;
1663 };
1664 xfi-10g-kr@3 {
1665 reg = <3>;
1666 qlm-mode = "0x013,xfi-10g-kr";
1667 local-mac-address = [ 00 00 00 00 00 00 ];
1668 phy-handle = <&xfi13>;
1669 };
1670 xlaui@0 {
1671 reg = <0>;
1672 qlm-mode = "0x010,xlaui";
1673 local-mac-address = [ 00 00 00 00 00 00 ];
1674 phy-handle = <&xlaui10>;
1675 };
1676 xlaui-40g-kr-@0 {
1677 reg = <0>;
1678 qlm-mode = "0x010,xlaui-40g-kr";
1679 local-mac-address = [ 00 00 00 00 00 00 ];
1680 phy-handle = <&xlaui10>;
1681 };
1682 xaui@0 {
1683 reg = <0>;
1684 qlm-mode = "0x010,xaui";
1685 local-mac-address = [ 00 00 00 00 00 00 ];
1686 phy-handle = <&xaui10>;
1687 };
1688 rxaui@0 {
1689 reg = <0>;
1690 qlm-mode = "0x010,rxaui";
1691 local-mac-address = [ 00 00 00 00 00 00 ];
1692 phy-handle = <&rxaui10>;
1693 };
1694 rxaui@2 {
1695 reg = <2>;
1696 qlm-mode = "0x012,rxaui";
1697 local-mac-address = [ 00 00 00 00 00 00 ];
1698 phy-handle = <&rxaui12>;
1699 };
1700 };
1701 };
1702
1703// SPI configuration for EBB8800 testing
1704// spi@7,0 {
1705// compatible = "cavium,thunder-8890-spi";
1706// reg = <0x3800 0 0 0 0>; /* DEVFN = 0x38 (7:0) */
1707// #address-cells = <1>;
1708// #size-cells = <0>;
1709// clocks = <&sclk>;
1710//
1711// flash@0 {
1712// compatible = "jedec,spi-nor";
1713// reg = <0>;
1714// spi-max-frequency = <16000000>;
1715// #address-cells = <1>;
1716// #size-cells = <1>;
1717// };
1718// };
1719//
1720 };
1721
1722 ecam1: pci@849000000000 {
1723 compatible = "cavium,pci-host-thunder-ecam";
1724 device_type = "pci";
1725 msi-parent = <&its>;
1726 msi-map = <0 &its 0x10000 0x10000>;
1727 bus-range = <0 31>;
1728 #size-cells = <2>;
1729 #address-cells = <3>;
1730 #stream-id-cells = <1>;
1731 dma-coherent;
1732 reg = <0x8490 0x00000000 0 0x02000000>; /* Configuration space */
1733 ranges = <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>; /* mem ranges */
1734 };
1735
1736 ecam2: pci@84a000000000 {
1737 compatible = "cavium,pci-host-thunder-ecam";
1738 device_type = "pci";
1739 msi-parent = <&its>;
1740 msi-map = <0 &its 0x20000 0x10000>;
1741 bus-range = <0 31>;
1742 #size-cells = <2>;
1743 #address-cells = <3>;
1744 #stream-id-cells = <1>;
1745 dma-coherent;
1746 reg = <0x84a0 0x00000000 0 0x02000000>; /* Configuration space */
1747 ranges = <0x03000000 0x8420 0x00000000 0x8420 0x00000000 0x20 0x00000000>; /* mem ranges */
1748 };
1749
1750 ecam3: pci@84b000000000 {
1751 compatible = "cavium,pci-host-thunder-ecam";
1752 device_type = "pci";
1753 msi-parent = <&its>;
1754 msi-map = <0 &its 0x30000 0x10000>;
1755 bus-range = <0 31>;
1756 #size-cells = <2>;
1757 #address-cells = <3>;
1758 #stream-id-cells = <1>;
1759 dma-coherent;
1760 reg = <0x84b0 0x00000000 0 0x02000000>; /* Configuration space */
1761 ranges = <0x03000000 0x8180 0x00000000 0x8180 0x00000000 0x80 0x00000000>; /* mem ranges */
1762 };
1763
1764 pem0: pci@87e0c0000000 {
1765
1766 /* "cavium,pci-host-thunder-pem" implies that
1767 the first bus in bus-range has config access
1768 via the "PEM space", subsequent buses have
1769 config assess via the "Configuration space".
1770 The "mem64 PEM" range is used to map the PEM
1771 BAR0, which is used by the AER and PME MSI-X
1772 sources. UEFI and Linux must assign the same
1773 bus number to each device, otherwise Linux
1774 enumeration gets confused. Because UEFI
1775 skips the PEM bus and its PCIe-RC bridge it
1776 uses a numbering that starts 1 bus higher.
1777 */
1778
1779 compatible = "cavium,pci-host-thunder-pem";
1780 device_type = "pci";
1781 msi-parent = <&its>;
1782 msi-map = <0 &its 0x10000 0x10000>;
1783 bus-range = <0x1f 0x57>;
1784 #size-cells = <2>;
1785 #address-cells = <3>;
1786 #stream-id-cells = <1>;
1787 dma-coherent;
1788 reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */
1789 <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */
1790 ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */
1791 <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */
1792 <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */
1793 <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */
1794
1795 #interrupt-cells = <1>;
1796 interrupt-map-mask = <0 0 0 7>;
1797 interrupt-map = <0 0 0 1 &gic0 0 0 0 16 4>, /* INTA */
1798 <0 0 0 2 &gic0 0 0 0 17 4>, /* INTB */
1799 <0 0 0 3 &gic0 0 0 0 18 4>, /* INTC */
1800 <0 0 0 4 &gic0 0 0 0 19 4>; /* INTD */
1801 };
1802
1803 pem1: pci@87e0c1000000 {
1804 compatible = "cavium,pci-host-thunder-pem";
1805 device_type = "pci";
1806 msi-parent = <&its>;
1807 msi-map = <0 &its 0x10000 0x10000>;
1808 bus-range = <0x57 0x8f>;
1809 #size-cells = <2>;
1810 #address-cells = <3>;
1811 #stream-id-cells = <1>;
1812 dma-coherent;
1813 reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */
1814 <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */
1815 ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */
1816 <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */
1817 <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */
1818 <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */
1819
1820 #interrupt-cells = <1>;
1821 interrupt-map-mask = <0 0 0 7>;
1822 interrupt-map = <0 0 0 1 &gic0 0 0 0 20 4>, /* INTA */
1823 <0 0 0 2 &gic0 0 0 0 21 4>, /* INTB */
1824 <0 0 0 3 &gic0 0 0 0 22 4>, /* INTC */
1825 <0 0 0 4 &gic0 0 0 0 23 4>; /* INTD */
1826 };
1827
1828 pem2: pci@87e0c2000000 {
1829 compatible = "cavium,pci-host-thunder-pem";
1830 device_type = "pci";
1831 msi-parent = <&its>;
1832 msi-map = <0 &its 0x10000 0x10000>;
1833 bus-range = <0x8f 0xc7>;
1834 #size-cells = <2>;
1835 #address-cells = <3>;
1836 #stream-id-cells = <1>;
1837 dma-coherent;
1838 reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */
1839 <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */
1840 ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */
1841 <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */
1842 <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
1843 <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */
1844
1845 #interrupt-cells = <1>;
1846 interrupt-map-mask = <0 0 0 7>;
1847 interrupt-map = <0 0 0 1 &gic0 0 0 0 24 4>, /* INTA */
1848 <0 0 0 2 &gic0 0 0 0 25 4>, /* INTB */
1849 <0 0 0 3 &gic0 0 0 0 26 4>, /* INTC */
1850 <0 0 0 4 &gic0 0 0 0 27 4>; /* INTD */
1851 };
1852
1853 pem3: pci@87e0c3000000 {
1854 compatible = "cavium,pci-host-thunder-pem";
1855 device_type = "pci";
1856 msi-parent = <&its>;
1857 msi-map = <0 &its 0x30000 0x10000>;
1858 bus-range = <0x1f 0x57>;
1859 #size-cells = <2>;
1860 #address-cells = <3>;
1861 #stream-id-cells = <1>;
1862 dma-coherent;
1863 reg = <0x8900 0x1f000000 0x0 0x39000000>, /* Configuration space */
1864 <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */
1865 ranges = <0x01000000 0x00 0x00030000 0x8930 0x00030000 0x00 0x00010000>, /* I/O */
1866 <0x03000000 0x00 0x10000000 0x8910 0x10000000 0x0f 0xf0000000>, /* mem64 */
1867 <0x43000000 0x10 0x00000000 0x8920 0x00000000 0x10 0x00000000>, /* mem64-pref */
1868 <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */
1869
1870 #interrupt-cells = <1>;
1871 interrupt-map-mask = <0 0 0 7>;
1872 interrupt-map = <0 0 0 1 &gic0 0 0 0 28 4>, /* INTA */
1873 <0 0 0 2 &gic0 0 0 0 29 4>, /* INTB */
1874 <0 0 0 3 &gic0 0 0 0 30 4>, /* INTC */
1875 <0 0 0 4 &gic0 0 0 0 31 4>; /* INTD */
1876 };
1877
1878 pem4: pci@87e0c4000000 {
1879 compatible = "cavium,pci-host-thunder-pem";
1880 device_type = "pci";
1881 msi-parent = <&its>;
1882 msi-map = <0 &its 0x30000 0x10000>;
1883 bus-range = <0x57 0x8f>;
1884 #size-cells = <2>;
1885 #address-cells = <3>;
1886 #stream-id-cells = <1>;
1887 dma-coherent;
1888 reg = <0x8940 0x57000000 0x0 0x39000000>, /* Configuration space */
1889 <0x87e0 0xc4000000 0x0 0x01000000>; /* PEM space */
1890 ranges = <0x01000000 0x00 0x00040000 0x8970 0x00040000 0x00 0x00010000>, /* I/O */
1891 <0x03000000 0x00 0x10000000 0x8950 0x10000000 0x0f 0xf0000000>, /* mem64 */
1892 <0x43000000 0x10 0x00000000 0x8960 0x00000000 0x10 0x00000000>, /* mem64-pref */
1893 <0x03000000 0x87e0 0xc4000000 0x87e0 0xc4000000 0x00 0x01000000>; /* mem64 PEM */
1894
1895 #interrupt-cells = <1>;
1896 interrupt-map-mask = <0 0 0 7>;
1897 interrupt-map = <0 0 0 1 &gic0 0 0 0 32 4>, /* INTA */
1898 <0 0 0 2 &gic0 0 0 0 33 4>, /* INTB */
1899 <0 0 0 3 &gic0 0 0 0 34 4>, /* INTC */
1900 <0 0 0 4 &gic0 0 0 0 35 4>; /* INTD */
1901 };
1902
1903 pem5: pci@87e0c5000000 {
1904 compatible = "cavium,pci-host-thunder-pem";
1905 device_type = "pci";
1906 msi-parent = <&its>;
1907 msi-map = <0 &its 0x30000 0x10000>;
1908 bus-range = <0x8f 0xc7>;
1909 #size-cells = <2>;
1910 #address-cells = <3>;
1911 #stream-id-cells = <1>;
1912 dma-coherent;
1913 reg = <0x8980 0x8f000000 0x0 0x39000000>, /* Configuration space */
1914 <0x87e0 0xc5000000 0x0 0x01000000>; /* PEM space */
1915 ranges = <0x01000000 0x00 0x00050000 0x89b0 0x00050000 0x00 0x00010000>, /* I/O */
1916 <0x03000000 0x00 0x10000000 0x8990 0x10000000 0x0f 0xf0000000>, /* mem64 */
1917 <0x43000000 0x10 0x00000000 0x89a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
1918 <0x03000000 0x87e0 0xc5000000 0x87e0 0xc5000000 0x00 0x01000000>; /* mem64 PEM */
1919
1920 #interrupt-cells = <1>;
1921 interrupt-map-mask = <0 0 0 7>;
1922 interrupt-map = <0 0 0 1 &gic0 0 0 0 36 4>, /* INTA */
1923 <0 0 0 2 &gic0 0 0 0 37 4>, /* INTB */
1924 <0 0 0 3 &gic0 0 0 0 38 4>, /* INTC */
1925 <0 0 0 4 &gic0 0 0 0 39 4>; /* INTD */
1926 };
1927
1928 };
1929
1930 soc@100000000000 {
1931 compatible = "simple-bus";
1932 #address-cells = <2>;
1933 #size-cells = <2>;
1934 ranges = <0x8000 0 0x9000 0x00000000 0x1000 0x00000000>;
1935 numa-node-id = <1>;
1936
1937 smmu4@830000000000 {
1938 compatible = "cavium,smmu-v2";
1939 reg = <0x8300 0x0 0x0 0x2000000>;
1940 #global-interrupts = <1>;
1941 interrupts = <0 76 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1942 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1943 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1944 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1945 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1946 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1947 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1948 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1949 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1950 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1951 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1952 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1953 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1954 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1955 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1956 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1957 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1958 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1959 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1960 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1961 <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>, <0 77 4>,
1962 <0 77 4>, <0 77 4>, <0 77 4>;
1963
1964 mmu-masters = <&ecam4 0x100>;
1965 };
1966
1967 smmu5@831000000000 {
1968 compatible = "cavium,smmu-v2";
1969 reg = <0x8310 0x0 0x0 0x2000000>;
1970 #global-interrupts = <1>;
1971 interrupts = <0 78 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1972 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1973 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1974 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1975 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1976 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1977 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1978 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1979 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1980 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1981 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1982 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1983 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1984 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1985 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1986 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1987 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1988 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1989 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1990 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1991 <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>, <0 79 4>,
1992 <0 79 4>, <0 79 4>, <0 79 4>;
1993
1994 mmu-masters = <&ecam5 0x100>,
1995 <&pem6 0x200>,
1996 <&pem7 0x300>,
1997 <&pem8 0x400>;
1998 };
1999
2000 smmu6@832000000000 {
2001 compatible = "cavium,smmu-v2";
2002 reg = <0x8320 0x0 0x0 0x2000000>;
2003 #global-interrupts = <1>;
2004 interrupts = <0 80 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2005 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2006 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2007 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2008 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2009 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2010 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2011 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2012 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2013 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2014 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2015 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2016 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2017 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2018 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2019 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2020 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2021 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2022 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2023 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2024 <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>, <0 81 4>,
2025 <0 81 4>, <0 81 4>, <0 81 4>;
2026
2027 mmu-masters = <&ecam6 0x100>;
2028 };
2029
2030 smmu7@833000000000 {
2031 compatible = "cavium,smmu-v2";
2032 reg = <0x8330 0x0 0x0 0x2000000>;
2033 #global-interrupts = <1>;
2034
2035 interrupts = <0 82 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2036 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2037 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2038 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2039 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2040 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2041 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2042 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2043 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2044 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2045 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2046 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2047 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2048 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2049 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2050 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2051 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2052 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2053 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2054 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2055 <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>, <0 83 4>,
2056 <0 83 4>, <0 83 4>, <0 83 4>;
2057
2058 mmu-masters = <&ecam7 0x100>,
2059 <&pem9 0x200>,
2060 <&pem10 0x300>,
2061 <&pem11 0x400>;
2062 };
2063
2064
2065 ecam4: pci@848000000000 {
2066 compatible = "cavium,pci-host-thunder-ecam";
2067 device_type = "pci";
2068 msi-parent = <&its1>;
2069 msi-map = <0 &its1 0x80000 0x10000>;
2070 bus-range = <0 31>;
2071 #size-cells = <2>;
2072 #address-cells = <3>;
2073 #stream-id-cells = <1>;
2074 dma-coherent;
2075 reg = <0x8480 0x00000000 0 0x02000000>; /* Configuration space */
2076 ranges = <0x03000000 0x8020 0x00000000 0x8020 0x00000000 0x060 0x00000000>, /* mem ranges */
2077 <0x03000000 0x8380 0x00000000 0x8380 0x00000000 0x0a0 0x00000000>, /* ZIP et al. */
2078 <0x03000000 0x8460 0x00000000 0x8460 0x00000000 0x020 0x00000000>, /* DFA et al. */
2079 <0x03000000 0x8680 0x00000000 0x8680 0x00000000 0x160 0x24000000>, /* hole for UARTs */
2080 <0x03000000 0x87e0 0x26000000 0x87e0 0x26000000 0x000 0x9a000000>, /* hole for PEMs */
2081 <0x03000000 0x87e0 0xc6000000 0x87e0 0xc6000000 0x01f 0x3a000000>;
2082
2083 mrml-bridge@1,0 {
2084 compatible = "cavium,thunder-8890-mrml-bridge";
2085 device_type = "pci";
2086 #size-cells = <2>;
2087 #address-cells = <3>;
2088 ranges = <0x03000000 0x87e0 0x00000000 0x03000000 0x87e0 0x00000000 0x10 0x00000000>;
2089 reg = <0x0800 0 0 0 0>; /* DEVFN = 0x08 (1:0) */
2090
2091 mdio-nexus@1,3 {
2092 compatible = "cavium,thunder-8890-mdio-nexus";
2093 #address-cells = <2>;
2094 #size-cells = <2>;
2095 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
2096 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
2097 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
2098
2099 mdio@87e05003800 {
2100 compatible = "cavium,thunder-8890-mdio";
2101 #address-cells = <1>;
2102 #size-cells = <0>;
2103 reg = <0x87e0 0x05003800 0x0 0x30>;
2104
2105 sgmii20: sgmii@0 {
2106 qlm-mode = "0x100,sgmii";
2107 reg = <0> ;
2108 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2109 /* LED[2,1]: Speed, LED[3]: RX, LED[0]: TX, all open-drain */
2110 marvell,reg-init = <3 0x10 0 0x8665>,
2111 <3 0x11 0 0x00aa>,
2112 <3 0x12 0 0x4105>,
2113 <3 0x13 0 0x8a08>;
2114 };
2115 sgmii21: sgmii@1 {
2116 qlm-mode = "0x101,sgmii";
2117 reg = <1> ;
2118 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2119 marvell,reg-init = <3 0x10 0 0x8665>,
2120 <3 0x11 0 0x00aa>,
2121 <3 0x12 0 0x4105>,
2122 <3 0x13 0 0x8a08>;
2123 };
2124 sgmii22: sgmii@2 {
2125 qlm-mode = "0x102,sgmii";
2126 reg = <2> ;
2127 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2128 marvell,reg-init = <3 0x10 0 0x8665>,
2129 <3 0x11 0 0x00aa>,
2130 <3 0x12 0 0x4105>,
2131 <3 0x13 0 0x8a08>;
2132 };
2133 sgmii23: sgmii@3 {
2134 qlm-mode = "0x103,sgmii";
2135 reg = <3> ;
2136 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2137 marvell,reg-init = <3 0x10 0 0x8665>,
2138 <3 0x11 0 0x00aa>,
2139 <3 0x12 0 0x4105>,
2140 <3 0x13 0 0x8a08>;
2141 };
2142 xfi20: xfi@0 {
2143 qlm-mode = "0x100,xfi","0x100,xfi-10g-kr";
2144 reg = <0> ;
2145 compatible = "cortina,cs4223-slice";
2146 };
2147 xfi21: xfi@1 {
2148 qlm-mode = "0x101,xfi","0x101,xfi-10g-kr";
2149 reg = <1> ;
2150 compatible = "cortina,cs4223-slice";
2151 };
2152 xfi22: xfi@2 {
2153 qlm-mode = "0x102,xfi","0x102,xfi-10g-kr";
2154 reg = <2> ;
2155 compatible = "cortina,cs4223-slice";
2156 };
2157 xfi23: xfi@3 {
2158 qlm-mode = "0x103,xfi","0x103,xfi-10g-kr";
2159 reg = <3> ;
2160 compatible = "cortina,cs4223-slice";
2161 };
2162 xlaui20: xlaui@0 {
2163 qlm-mode = "0x100,xlaui","0x100,xlaui-40g-kr";
2164 reg = <0> ;
2165 compatible = "cortina,cs4223-slice";
2166 };
2167 xaui20: xaui@0 {
2168 qlm-mode = "0x100,xaui";
2169 reg = <0> ;
2170 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
2171 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
2172 };
2173 rxaui20: rxaui@0 {
2174 qlm-mode = "0x100,rxaui";
2175 reg = <0> ;
2176 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
2177 };
2178 rxaui22: rxaui@1 {
2179 qlm-mode = "0x102,rxaui";
2180 reg = <1> ;
2181 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
2182 };
2183 };
2184
2185 mdio@87e005003880 {
2186 compatible = "cavium,thunder-8890-mdio";
2187 #address-cells = <1>;
2188 #size-cells = <0>;
2189 reg = <0x87e0 0x05003880 0x0 0x30>;
2190
2191 sgmii30: sgmii@4 {
2192 qlm-mode = "0x110,sgmii";
2193 reg = <4> ;
2194 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2195 marvell,reg-init = <3 0x10 0 0x8665>,
2196 <3 0x11 0 0x00aa>,
2197 <3 0x12 0 0x4105>,
2198 <3 0x13 0 0x8a08>;
2199 };
2200 sgmii31: sgmii@5 {
2201 qlm-mode = "0x111,sgmii";
2202 reg = <5> ;
2203 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2204 marvell,reg-init = <3 0x10 0 0x8665>,
2205 <3 0x11 0 0x00aa>,
2206 <3 0x12 0 0x4105>,
2207 <3 0x13 0 0x8a08>;
2208
2209 };
2210 sgmii32: sgmii@6 {
2211 qlm-mode = "0x112,sgmii";
2212 reg = <6> ;
2213 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2214 marvell,reg-init = <3 0x10 0 0x8665>,
2215 <3 0x11 0 0x00aa>,
2216 <3 0x12 0 0x4105>,
2217 <3 0x13 0 0x8a08>;
2218 };
2219 sgmii33: sgmii@7 {
2220 qlm-mode = "0x113,sgmii";
2221 reg = <7> ;
2222 compatible = "marvell,88e1240", "ethernet-phy-ieee802.3-c22";
2223 marvell,reg-init = <3 0x10 0 0x8665>,
2224 <3 0x11 0 0x00aa>,
2225 <3 0x12 0 0x4105>,
2226 <3 0x13 0 0x8a08>;
2227 };
2228 xfi30: xfi@0 {
2229 qlm-mode = "0x110,xfi","0x110,xfi-10g-kr";
2230 reg = <0> ;
2231 compatible = "cortina,cs4223-slice";
2232 };
2233 xfi31: xfi@1 {
2234 qlm-mode = "0x111,xfi","0x111,xfi-10g-kr";
2235 reg = <1> ;
2236 compatible = "cortina,cs4223-slice";
2237 };
2238 xfi32: xfi@2 {
2239 qlm-mode = "0x112,xfi","0x112,xfi-10g-kr";
2240 reg = <2> ;
2241 compatible = "cortina,cs4223-slice";
2242 };
2243 xfi33: xfi@3 {
2244 qlm-mode = "0x113,xfi","0x113,xfi-10g-kr";
2245 reg = <3> ;
2246 compatible = "cortina,cs4223-slice";
2247 };
2248 xlaui30: xlaui@0 {
2249 qlm-mode = "0x110,xlaui","0x110,xlaui-40g-kr";
2250 reg = <0> ;
2251 compatible = "cortina,cs4223-slice";
2252 };
2253 xaui30: xaui@4 {
2254 qlm-mode = "0x110,xaui";
2255 reg = <4> ;
2256 compatible = "broadcom,bcm8706", "ethernet-phy-ieee802.3-c45";
2257 broadcom,c45-reg-init = <1 0xc808 0xff8f 0x70>;
2258 };
2259 rxaui30: rxaui@0 {
2260 qlm-mode = "0x110,rxaui";
2261 reg = <0> ;
2262 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
2263 };
2264 rxaui32: rxaui@1 {
2265 qlm-mode = "0x112,rxaui";
2266 reg = <1> ;
2267 compatible = "marvell,88x3120", "ethernet-phy-ieee802.3-c45";
2268 };
2269 };
2270 };
2271
2272
2273
2274 bgx2 {
2275 #address-cells = <1>;
2276 #size-cells = <0>;
2277 reg = <0x8000 0 0 0 0>; /* DEVFN = 0x80 (16:0) */
2278 /* typename+qlm+typenumber eg :
2279 sgmii+bgx0+sgmmi0
2280 */
2281 // SGMII
2282 sgmii@0 {
2283 reg = <0>;
2284 qlm-mode = "0x100,sgmii";
2285 local-mac-address = [ 00 00 00 00 00 00 ];
2286 phy-handle = <&sgmii20>;
2287 };
2288 sgmii@1 {
2289 reg = <1>;
2290 qlm-mode = "0x101,sgmii";
2291 local-mac-address = [ 00 00 00 00 00 00 ];
2292 phy-handle = <&sgmii21>;
2293 };
2294 sgmii@2 {
2295 reg = <2>;
2296 qlm-mode = "0x102,sgmii";
2297 local-mac-address = [ 00 00 00 00 00 00 ];
2298 phy-handle = <&sgmii22>;
2299 };
2300 sgmii@3 {
2301 reg = <3>;
2302 qlm-mode = "0x103,sgmii";
2303 local-mac-address = [ 00 00 00 00 00 00 ];
2304 phy-handle = <&sgmii23>;
2305 };
2306 xfi@0 {
2307 reg = <0>;
2308 qlm-mode = "0x100,xfi";
2309 local-mac-address = [ 00 00 00 00 00 00 ];
2310 phy-handle = <&xfi20>;
2311 };
2312 xfi@1 {
2313 reg = <1>;
2314 qlm-mode = "0x101,xfi";
2315 local-mac-address = [ 00 00 00 00 00 00 ];
2316 phy-handle = <&xfi21>;
2317 };
2318 xfi@2 {
2319 reg = <2>;
2320 qlm-mode = "0x102,xfi";
2321 local-mac-address = [ 00 00 00 00 00 00 ];
2322 phy-handle = <&xfi22>;
2323 };
2324 xfi@3 {
2325 reg = <3>;
2326 qlm-mode = "0x103,xfi";
2327 local-mac-address = [ 00 00 00 00 00 00 ];
2328 phy-handle = <&xfi23>;
2329 };
2330 // 10g-kr
2331 xfi-10g-kr@0 {
2332 reg = <0>;
2333 qlm-mode = "0x100,xfi-10g-kr";
2334 local-mac-address = [ 00 00 00 00 00 00 ];
2335 phy-handle = <&xfi20>;
2336 };
2337 xfi-10g-kr@1 {
2338 reg = <1>;
2339 qlm-mode = "0x101,xfi-10g-kr";
2340 local-mac-address = [ 00 00 00 00 00 00 ];
2341 phy-handle = <&xfi21>;
2342 };
2343 xfi-10g-kr@2 {
2344 reg = <2>;
2345 qlm-mode = "0x102,xfi-10g-kr";
2346 local-mac-address = [ 00 00 00 00 00 00 ];
2347 phy-handle = <&xfi22>;
2348 };
2349 xfi-10g-kr@3 {
2350 reg = <3>;
2351 qlm-mode = "0x103,xfi-10g-kr";
2352 local-mac-address = [ 00 00 00 00 00 00 ];
2353 phy-handle = <&xfi23>;
2354 };
2355 xlaui@0 {
2356 reg = <0>;
2357 qlm-mode = "0x100,xlaui";
2358 local-mac-address = [ 00 00 00 00 00 00 ];
2359 phy-handle = <&xlaui20>;
2360 };
2361 xlaui-40g-kr@0 {
2362 reg = <0>;
2363 qlm-mode = "0x100,xlaui-40g-kr";
2364 local-mac-address = [ 00 00 00 00 00 00 ];
2365 phy-handle = <&xlaui20>;
2366 };
2367 xaui@0 {
2368 reg = <0>;
2369 qlm-mode = "0x100,xaui";
2370 local-mac-address = [ 00 00 00 00 00 00 ];
2371 phy-handle = <&xaui20>;
2372 };
2373 rxaui@0 {
2374 reg = <0>;
2375 qlm-mode = "0x100,rxaui";
2376 local-mac-address = [ 00 00 00 00 00 00 ];
2377 phy-handle = <&rxaui20>;
2378 };
2379 rxaui@2 {
2380 reg = <2>;
2381 qlm-mode = "0x102,rxaui";
2382 local-mac-address = [ 00 00 00 00 00 00 ];
2383 phy-handle = <&rxaui22>;
2384 };
2385 };
2386
2387 bgx3 {
2388 #address-cells = <1>;
2389 #size-cells = <0>;
2390 reg = <0x8100 0 0 0 0>; /* DEVFN = 0x81 (16:1) */
2391
2392 sgmii@0 {
2393 reg = <0>;
2394 qlm-mode = "0x110,sgmii";
2395 local-mac-address = [ 00 00 00 00 00 00 ];
2396 phy-handle = <&sgmii30>; /*"sgmmi"+bgx+no */
2397 };
2398 sgmii@1 {
2399 reg = <1>;
2400 qlm-mode = "0x111,sgmii";
2401 local-mac-address = [ 00 00 00 00 00 00 ];
2402 phy-handle = <&sgmii31>;
2403 };
2404 sgmii@2 {
2405 reg = <2>;
2406 qlm-mode = "0x112,sgmii";
2407 local-mac-address = [ 00 00 00 00 00 00 ];
2408 phy-handle = <&sgmii32>;
2409 };
2410 sgmii@3 {
2411 reg = <3>;
2412 qlm-mode = "0x113,sgmii";
2413 local-mac-address = [ 00 00 00 00 00 00 ];
2414 phy-handle = <&sgmii33>;
2415 };
2416 xfi@0 {
2417 reg = <0>;
2418 qlm-mode = "0x110,xfi";
2419 local-mac-address = [ 00 00 00 00 00 00 ];
2420 phy-handle = <&xfi30>;
2421 };
2422 xfi@1 {
2423 reg = <1>;
2424 qlm-mode = "0x111,xfi";
2425 local-mac-address = [ 00 00 00 00 00 00 ];
2426 phy-handle = <&xfi31>;
2427 };
2428 xfi@2 {
2429 reg = <2>;
2430 qlm-mode = "0x112,xfi";
2431 local-mac-address = [ 00 00 00 00 00 00 ];
2432 phy-handle = <&xfi32>;
2433 };
2434 xfi@3 {
2435 reg = <3>;
2436 qlm-mode = "0x113,xfi";
2437 local-mac-address = [ 00 00 00 00 00 00 ];
2438 phy-handle = <&xfi33>;
2439 };
2440 // 10g_kr
2441 xfi-10g-kr@0 {
2442 reg = <0>;
2443 qlm-mode = "0x110,xfi-10g-kr";
2444 local-mac-address = [ 00 00 00 00 00 00 ];
2445 phy-handle = <&xfi30>;
2446 };
2447 xfi-10g-kr@1 {
2448 reg = <1>;
2449 qlm-mode = "0x111,xfi-10g-kr";
2450 local-mac-address = [ 00 00 00 00 00 00 ];
2451 phy-handle = <&xfi31>;
2452 };
2453 xfi-10g-kr@2 {
2454 reg = <2>;
2455 qlm-mode = "0x112,xfi-10g-kr";
2456 local-mac-address = [ 00 00 00 00 00 00 ];
2457 phy-handle = <&xfi32>;
2458 };
2459 xfi-10g-kr@3 {
2460 reg = <3>;
2461 qlm-mode = "0x113,xfi-10g-kr";
2462 local-mac-address = [ 00 00 00 00 00 00 ];
2463 phy-handle = <&xfi33>;
2464 };
2465 xlaui@0 {
2466 reg = <0>;
2467 qlm-mode = "0x110,xlaui";
2468 local-mac-address = [ 00 00 00 00 00 00 ];
2469 phy-handle = <&xlaui30>;
2470 };
2471 xlaui-40g-kr@0 {
2472 reg = <0>;
2473 qlm-mode = "0x110,xlaui-40g-kr";
2474 local-mac-address = [ 00 00 00 00 00 00 ];
2475 phy-handle = <&xlaui30>;
2476 };
2477 xaui@0 {
2478 reg = <0>;
2479 qlm-mode = "0x110,xaui";
2480 local-mac-address = [ 00 00 00 00 00 00 ];
2481 phy-handle = <&xaui30>;
2482 };
2483 rxaui@0 {
2484 reg = <0>;
2485 qlm-mode = "0x110,rxaui";
2486 local-mac-address = [ 00 00 00 00 00 00 ];
2487 phy-handle = <&rxaui30>;
2488 };
2489 rxaui@2 {
2490 reg = <2>;
2491 qlm-mode = "0x112,rxaui";
2492 local-mac-address = [ 00 00 00 00 00 00 ];
2493 phy-handle = <&rxaui32>;
2494 };
2495 };
2496 };
2497 };
2498
2499 ecam5: pci@849000000000 {
2500 compatible = "cavium,pci-host-thunder-ecam";
2501 device_type = "pci";
2502 msi-parent = <&its1>;
2503 msi-map = <0 &its1 0x90000 0x10000>;
2504 bus-range = <0 31>;
2505 #size-cells = <2>;
2506 #address-cells = <3>;
2507 #stream-id-cells = <1>;
2508 dma-coherent;
2509 reg = <0x8490 0x00000000 0 0x02000000>; /* Configuration space */
2510 ranges = <0x03000000 0x8100 0x00000000 0x8100 0x00000000 0x80 0x00000000>; /* mem ranges */
2511 };
2512
2513 ecam6: pci@84a000000000 {
2514 compatible = "cavium,pci-host-thunder-ecam";
2515 device_type = "pci";
2516 msi-parent = <&its1>;
2517 msi-map = <0 &its1 0xa0000 0x10000>;
2518 bus-range = <0 31>;
2519 #size-cells = <2>;
2520 #address-cells = <3>;
2521 #stream-id-cells = <1>;
2522 dma-coherent;
2523 reg = <0x84a0 0x00000000 0 0x02000000>; /* Configuration space */
2524 ranges = <0x03000000 0x8420 0x00000000 0x8420 0x00000000 0x20 0x00000000>; /* mem ranges */
2525 };
2526
2527 ecam7: pci@84b000000000 {
2528 compatible = "cavium,pci-host-thunder-ecam";
2529 device_type = "pci";
2530 msi-parent = <&its1>;
2531 msi-map = <0 &its1 0xb0000 0x10000>;
2532 bus-range = <0 31>;
2533 #size-cells = <2>;
2534 #address-cells = <3>;
2535 #stream-id-cells = <1>;
2536 dma-coherent;
2537 reg = <0x84b0 0x00000000 0 0x02000000>; /* Configuration space */
2538 ranges = <0x03000000 0x8180 0x00000000 0x8180 0x00000000 0x80 0x00000000>; /* mem ranges */
2539 };
2540
2541 pem6: pci@87e0c0000000 {
2542 compatible = "cavium,pci-host-thunder-pem";
2543 device_type = "pci";
2544 msi-parent = <&its1>;
2545 msi-map = <0 &its1 0x90000 0x10000>;
2546 bus-range = <0x1f 0x57>;
2547 #size-cells = <2>;
2548 #address-cells = <3>;
2549 #stream-id-cells = <1>;
2550 dma-coherent;
2551 reg = <0x8800 0x1f000000 0x0 0x39000000>, /* Configuration space */
2552 <0x87e0 0xc0000000 0x0 0x01000000>; /* PEM space */
2553 ranges = <0x01000000 0x00 0x00000000 0x8830 0x00000000 0x00 0x00010000>, /* I/O */
2554 <0x03000000 0x00 0x10000000 0x8810 0x10000000 0x0f 0xf0000000>, /* mem64 */
2555 <0x43000000 0x10 0x00000000 0x8820 0x00000000 0x10 0x00000000>, /* mem64-pref */
2556 <0x03000000 0x87e0 0xc0000000 0x87e0 0xc0000000 0x00 0x01000000>; /* mem64 PEM */
2557
2558 #interrupt-cells = <1>;
2559 interrupt-map-mask = <0 0 0 7>;
2560 interrupt-map = <0 0 0 1 &gic0 0 0 0 40 4>, /* INTA */
2561 <0 0 0 2 &gic0 0 0 0 41 4>, /* INTB */
2562 <0 0 0 3 &gic0 0 0 0 42 4>, /* INTC */
2563 <0 0 0 4 &gic0 0 0 0 43 4>; /* INTD */
2564 };
2565
2566 pem7: pci@87e0c1000000 {
2567 compatible = "cavium,pci-host-thunder-pem";
2568 device_type = "pci";
2569 msi-parent = <&its1>;
2570 msi-map = <0 &its1 0x90000 0x10000>;
2571 bus-range = <0x57 0x8f>;
2572 #size-cells = <2>;
2573 #address-cells = <3>;
2574 #stream-id-cells = <1>;
2575 dma-coherent;
2576 reg = <0x8840 0x57000000 0x0 0x39000000>, /* Configuration space */
2577 <0x87e0 0xc1000000 0x0 0x01000000>; /* PEM space */
2578 ranges = <0x01000000 0x00 0x00010000 0x8870 0x00010000 0x00 0x00010000>, /* I/O */
2579 <0x03000000 0x00 0x10000000 0x8850 0x10000000 0x0f 0xf0000000>, /* mem64 */
2580 <0x43000000 0x10 0x00000000 0x8860 0x00000000 0x10 0x00000000>, /* mem64-pref */
2581 <0x03000000 0x87e0 0xc1000000 0x87e0 0xc1000000 0x00 0x01000000>; /* mem64 PEM */
2582
2583 #interrupt-cells = <1>;
2584 interrupt-map-mask = <0 0 0 7>;
2585 interrupt-map = <0 0 0 1 &gic0 0 0 0 44 4>, /* INTA */
2586 <0 0 0 2 &gic0 0 0 0 45 4>, /* INTB */
2587 <0 0 0 3 &gic0 0 0 0 46 4>, /* INTC */
2588 <0 0 0 4 &gic0 0 0 0 47 4>; /* INTD */
2589 };
2590
2591 pem8: pci@87e0c2000000 {
2592 compatible = "cavium,pci-host-thunder-pem";
2593 device_type = "pci";
2594 msi-parent = <&its1>;
2595 msi-map = <0 &its1 0x90000 0x10000>;
2596 bus-range = <0x8f 0xc7>;
2597 #size-cells = <2>;
2598 #address-cells = <3>;
2599 #stream-id-cells = <1>;
2600 dma-coherent;
2601 reg = <0x8880 0x8f000000 0x0 0x39000000>, /* Configuration space */
2602 <0x87e0 0xc2000000 0x0 0x01000000>; /* PEM space */
2603 ranges = <0x01000000 0x00 0x00020000 0x88b0 0x00020000 0x00 0x00010000>, /* I/O */
2604 <0x03000000 0x00 0x10000000 0x8890 0x10000000 0x0f 0xf0000000>, /* mem64 */
2605 <0x43000000 0x10 0x00000000 0x88a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
2606 <0x03000000 0x87e0 0xc2000000 0x87e0 0xc2000000 0x00 0x01000000>; /* mem64 PEM */
2607
2608 #interrupt-cells = <1>;
2609 interrupt-map-mask = <0 0 0 7>;
2610 interrupt-map = <0 0 0 1 &gic0 0 0 0 48 4>, /* INTA */
2611 <0 0 0 2 &gic0 0 0 0 49 4>, /* INTB */
2612 <0 0 0 3 &gic0 0 0 0 50 4>, /* INTC */
2613 <0 0 0 4 &gic0 0 0 0 51 4>; /* INTD */
2614 };
2615
2616 pem9: pci@87e0c3000000 {
2617 compatible = "cavium,pci-host-thunder-pem";
2618 device_type = "pci";
2619 msi-parent = <&its1>;
2620 msi-map = <0 &its1 0xb0000 0x10000>;
2621 bus-range = <0x1f 0x57>;
2622 #size-cells = <2>;
2623 #address-cells = <3>;
2624 #stream-id-cells = <1>;
2625 dma-coherent;
2626 reg = <0x8900 0x1f000000 0x0 0x39000000>, /* Configuration space */
2627 <0x87e0 0xc3000000 0x0 0x01000000>; /* PEM space */
2628 ranges = <0x01000000 0x00 0x00030000 0x8930 0x00030000 0x00 0x00010000>, /* I/O */
2629 <0x03000000 0x00 0x10000000 0x8910 0x10000000 0x0f 0xf0000000>, /* mem64 */
2630 <0x43000000 0x10 0x00000000 0x8920 0x00000000 0x10 0x00000000>, /* mem64-pref */
2631 <0x03000000 0x87e0 0xc3000000 0x87e0 0xc3000000 0x00 0x01000000>; /* mem64 PEM */
2632
2633 #interrupt-cells = <1>;
2634 interrupt-map-mask = <0 0 0 7>;
2635 interrupt-map = <0 0 0 1 &gic0 0 0 0 52 4>, /* INTA */
2636 <0 0 0 2 &gic0 0 0 0 53 4>, /* INTB */
2637 <0 0 0 3 &gic0 0 0 0 54 4>, /* INTC */
2638 <0 0 0 4 &gic0 0 0 0 55 4>; /* INTD */
2639 };
2640
2641 pem10: pci@87e0c4000000 {
2642 compatible = "cavium,pci-host-thunder-pem";
2643 device_type = "pci";
2644 msi-parent = <&its1>;
2645 msi-map = <0 &its1 0xb0000 0x10000>;
2646 bus-range = <0x57 0x8f>;
2647 #size-cells = <2>;
2648 #address-cells = <3>;
2649 #stream-id-cells = <1>;
2650 dma-coherent;
2651 reg = <0x8940 0x57000000 0x0 0x39000000>, /* Configuration space */
2652 <0x87e0 0xc4000000 0x0 0x01000000>; /* PEM space */
2653 ranges = <0x01000000 0x00 0x00040000 0x8970 0x00040000 0x00 0x00010000>, /* I/O */
2654 <0x03000000 0x00 0x10000000 0x8950 0x10000000 0x0f 0xf0000000>, /* mem64 */
2655 <0x43000000 0x10 0x00000000 0x8960 0x00000000 0x10 0x00000000>, /* mem64-pref */
2656 <0x03000000 0x87e0 0xc4000000 0x87e0 0xc4000000 0x00 0x01000000>; /* mem64 PEM */
2657
2658 #interrupt-cells = <1>;
2659 interrupt-map-mask = <0 0 0 7>;
2660 interrupt-map = <0 0 0 1 &gic0 0 0 0 56 4>, /* INTA */
2661 <0 0 0 2 &gic0 0 0 0 57 4>, /* INTB */
2662 <0 0 0 3 &gic0 0 0 0 58 4>, /* INTC */
2663 <0 0 0 4 &gic0 0 0 0 59 4>; /* INTD */
2664 };
2665
2666 pem11: pci@87e0c5000000 {
2667 compatible = "cavium,pci-host-thunder-pem";
2668 device_type = "pci";
2669 msi-parent = <&its1>;
2670 msi-map = <0 &its1 0xb0000 0x10000>;
2671 bus-range = <0x8f 0xc7>;
2672 #size-cells = <2>;
2673 #address-cells = <3>;
2674 #stream-id-cells = <1>;
2675 dma-coherent;
2676 reg = <0x8980 0x8f000000 0x0 0x39000000>, /* Configuration space */
2677 <0x87e0 0xc5000000 0x0 0x01000000>; /* PEM space */
2678 ranges = <0x01000000 0x00 0x00050000 0x89b0 0x00050000 0x00 0x00010000>, /* I/O */
2679 <0x03000000 0x00 0x10000000 0x8990 0x10000000 0x0f 0xf0000000>, /* mem64 */
2680 <0x43000000 0x10 0x00000000 0x89a0 0x00000000 0x10 0x00000000>, /* mem64-pref */
2681 <0x03000000 0x87e0 0xc5000000 0x87e0 0xc5000000 0x00 0x01000000>; /* mem64 PEM */
2682
2683 #interrupt-cells = <1>;
2684 interrupt-map-mask = <0 0 0 7>;
2685 interrupt-map = <0 0 0 1 &gic0 0 0 0 60 4>, /* INTA */
2686 <0 0 0 2 &gic0 0 0 0 61 4>, /* INTB */
2687 <0 0 0 3 &gic0 0 0 0 62 4>, /* INTC */
2688 <0 0 0 4 &gic0 0 0 0 63 4>; /* INTD */
2689 };
2690 };
2691
2692 aliases {
2693 serial0 = &uaa0;
2694 serial1 = &uaa1;
2695 };
2696
2697 chosen {
2698 stdout-path = "serial0:115200n8";
2699 };
2700
2701 memory@0 {
2702 device_type = "memory";
2703 reg = <0x0 0x01400000 0x3 0xFEC00000>;
2704 /* socket 0 */
2705 numa-node-id = <0>;
2706 };
2707
2708 memory@10000000000 {
2709 device_type = "memory";
2710 reg = <0x100 0x00400000 0x3 0xFFC00000>;
2711 /* socket 1 */
2712 numa-node-id = <1>;
2713 };
2714
2715 distance-map {
2716 compatible = "numa-distance-map-v1";
2717 distance-matrix = <0 0 10>,
2718 <0 1 20>,
2719 <1 1 10>;
2720 };
2721};
diff --git a/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts
new file mode 100644
index 0000000..96e6bdf
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/nas8104-linux.dts
@@ -0,0 +1,165 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 sgmii00: sgmii00 {
58 qlm-mode = "0x000,sgmii";
59 reg = <0x0> ;
60 compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22";
61 };
62 sgmii01: sgmii01 {
63 qlm-mode = "0x001,sgmii";
64 reg = <0x1> ;
65 compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22";
66 };
67 };
68 mdio1@87e005003880 {
69 xfi10: xfi10 {
70 qlm-mode = "0x010,xfi";
71 reg = <0x0>;
72 compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45";
73 };
74 };
75 };
76
77 bgx0 {
78 /* typename+qlm+typenumber eg :
79 sgmii+bgx0+sgmmi0
80 */
81 sgmii00 {
82 reg = <0>;
83 qlm-mode = "0x000,sgmii";
84 local-mac-address = [00 00 00 00 00 00];
85 phy-handle = <&sgmii00>;
86 };
87 sgmii01 {
88 reg = <1>;
89 qlm-mode = "0x001,sgmii";
90 local-mac-address = [00 00 00 00 00 00];
91 phy-handle = <&sgmii01>;
92 };
93
94 };
95
96 bgx1 {
97 xfi10 {
98 reg = <0>;
99 qlm-mode = "0x010,xfi";
100 local-mac-address = [00 00 00 00 00 00];
101 phy-handle = <&xfi10>;
102 };
103 };
104};
105
106&mmc_1_4 {
107 /* NOTE: the BDK is responsible for swapping the two slots.
108 * Unfortunately there does not appear to be any way to read the
109 * position of SW2-7 in software.
110 */
111 /* Power on GPIO 8, active high, shared */
112 power-gpios = <&gpio_6_0 8 0>;
113
114 mmc-slot@0 {
115 compatible = "cavium,thunder-8890-mmc-slot";
116 reg = <0>;
117 /* Only 3.3v is supported */
118 voltage-ranges = <3300 3300>;
119 max-frequency = <26000000>;
120 /* 1.8v is not supported */
121 no-1-8-v;
122 /* Bus width is only 4 bits maximum */
123 bus-width = <4>;
124 /* No write-protect switch is present */
125 disable-wp;
126 /* There is no card detection available; polling must be used. */
127 broken-cd;
128 /* SD UHS SDR25 is supported */
129 sd-uhs-sdr25;
130 /* SD UHS SDR50 is supported */
131 sd-uhs-ddr50;
132 /* SD UHS DDR50 is supported */
133 sd-uhs-sdr50;
134 /* High-speed mode is supported */
135 cap-sd-highspeed;
136 };
137 mmc-slot@1 {
138 compatible = "cavium,thunder-8890-mmc-slot";
139 reg = <1>;
140 voltage-ranges = <3300 3300>;
141 max-frequency = <26000000>;
142 /* 1.8v is not supported */
143 no-1-8-v;
144 /* Bus width is only 8 bits maximum */
145 bus-width = <8>;
146 /* No write-protect switch is present */
147 disable-wp;
148 /* There is no card detection available; polling must be used. */
149 broken-cd;
150 /* High-speed mode is supported */
151 cap-mmc-highspeed;
152 /* eMMC device is soldered onto the board */
153 non-removable;
154 };
155};
156
157&spi_7_0 {
158 flash@0 {
159 compatible = "macronix,mx25l3206e", "jedec,spi-nor";
160 reg = <0x0>;
161 spi-max-frequency = <16000000>;
162 #address-cells = <1>;
163 #size-cells = <1>;
164 };
165};
diff --git a/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts b/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts
new file mode 100644
index 0000000..238abe1
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/rbd8030-linux.dts
@@ -0,0 +1,199 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 rgmii00: rgmii00 {
58 reg = <0> ;
59 compatible = "vitesse,vsc8531", "ethernet-phy-ieee802.3-c22";
60 };
61 };
62 mdio1@87e005003880 {
63 xfi11: xfi11 {
64 qlm-mode = "0x011,xfi";
65 reg = <0>;
66 compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45";
67 };
68 };
69 };
70
71 rgx0 {
72 rgmii00 {
73 reg = <0>;
74 local-mac-address = [00 00 00 00 00 00];
75 phy-handle = <&rgmii00>;
76 };
77 };
78
79 bgx0 {
80 /* typename+qlm+typenumber eg :
81 qsgmii+bgx0+sgmmi0
82 */
83 qsgmii00 {
84 reg = <0>;
85 qlm-mode = "0x000,qsgmii";
86 local-mac-address = [00 00 00 00 00 00];
87 cavium,disable-autonegotiation;
88 };
89 qsgmii01 {
90 reg = <1>;
91 qlm-mode = "0x001,qsgmii";
92 local-mac-address = [00 00 00 00 00 00];
93 cavium,disable-autonegotiation;
94 };
95 qsgmii02 {
96 reg = <2>;
97 qlm-mode = "0x002,qsgmii";
98 local-mac-address = [00 00 00 00 00 00];
99 cavium,disable-autonegotiation;
100 };
101 qsgmii03 {
102 reg = <3>;
103 qlm-mode = "0x003,qsgmii";
104 local-mac-address = [00 00 00 00 00 00];
105 cavium,disable-autonegotiation;
106 };
107 };
108
109 bgx1 {
110 /* vitesse vsc7224 */
111 xfi10 {
112 reg = <0>;
113 qlm-mode = "0x010,xfi";
114 local-mac-address = [00 00 00 00 00 00];
115 cavium,disable-autonegotiation;
116 };
117 /* aquantia aqr107 */
118 xfi11 {
119 reg = <1>;
120 qlm-mode = "0x011,xfi";
121 local-mac-address = [00 00 00 00 00 00];
122 phy-handle = <&xfi11>;
123 };
124 };
125};
126
127&mmc_1_4 {
128 /* NOTE: the BDK is responsible for swapping the two slots.
129 * Unfortunately there does not appear to be any way to read the
130 * position of SW2-7 in software.
131 */
132 /* Power on GPIO 8, active high, shared */
133 power-gpios = <&gpio_6_0 8 0>;
134
135 mmc-slot@0 {
136 compatible = "cavium,thunder-8890-mmc-slot";
137 reg = <0>;
138 /* Only 3.3v is supported */
139 voltage-ranges = <3300 3300>;
140 max-frequency = <26000000>;
141 /* 1.8v is not supported */
142 no-1-8-v;
143 /* Bus width is only 4 bits maximum */
144 bus-width = <4>;
145 /* No write-protect switch is present */
146 disable-wp;
147 /* There is no card detection available; polling must be used. */
148 broken-cd;
149 /* SD UHS SDR25 is supported */
150 sd-uhs-sdr25;
151 /* SD UHS SDR50 is supported */
152 sd-uhs-ddr50;
153 /* SD UHS DDR50 is supported */
154 sd-uhs-sdr50;
155 /* High-speed mode is supported */
156 cap-sd-highspeed;
157 /* speed up device probing */
158 no-sdio;
159 no-mmc;
160 };
161 mmc-slot@1 {
162 compatible = "cavium,thunder-8890-mmc-slot";
163 reg = <1>;
164 voltage-ranges = <3300 3300>;
165 max-frequency = <26000000>;
166 /* 1.8v is not supported */
167 no-1-8-v;
168 /* Bus width is only 8 bits maximum */
169 bus-width = <8>;
170 /* No write-protect switch is present */
171 disable-wp;
172 /* There is no card detection available; polling must be used. */
173 broken-cd;
174 /* High-speed mode is supported */
175 cap-mmc-highspeed;
176 /* eMMC device is soldered onto the board */
177 non-removable;
178 /* speed up device probing */
179 no-sdio;
180 no-sd;
181 };
182};
183
184&i2c_9_0 {
185 rtc@68 {
186 compatible = "dallas,ds1337";
187 reg = <0x68>;
188 };
189};
190
191&spi_7_0 {
192 flash@0 {
193 compatible = "micron,n25q128a13", "spi-flash";
194 reg = <0x0>;
195 spi-max-frequency = <16000000>;
196 #address-cells = <1>;
197 #size-cells = <1>;
198 };
199};
diff --git a/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts b/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts
new file mode 100644
index 0000000..0190995
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium/dts/sff8104-linux.dts
@@ -0,0 +1,301 @@
1/*
2 * Cavium Thunder DTS file - Thunder board description
3 *
4 * Copyright (C) 2016, Cavium Inc.
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
48 */
49
50/dts-v1/;
51
52/include/ "cn81xx-linux.dtsi"
53
54&mrml_bridge {
55 mdio-nexus@1,3 {
56 mdio0@87e005003800 {
57 rgmii00: rgmii00 {
58 reg = <0> ;
59 compatible = "marvell,88e1510", "ethernet-phy-ieee802.3-c22";
60 };
61
62 qsgmii00: qsgmii00 {
63 qlm-mode = "0x000,qsgmii";
64 reg = <0x10> ;
65 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
66 };
67 qsgmii01: qsgmii01 {
68 qlm-mode = "0x001,qsgmii";
69 reg = <0x11> ;
70 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
71 };
72 qsgmii02: qsgmii02 {
73 qlm-mode = "0x002,qsgmii";
74 reg = <0x12> ;
75 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
76 };
77 qsgmii03: qsgmii03 {
78 qlm-mode = "0x003,qsgmii";
79 reg = <0x13> ;
80 compatible = "vitesse,vsc8574", "ethernet-phy-ieee802.3-c22";
81 };
82 };
83 mdio1@87e005003880 {
84 xfi00: xfi00 {
85 qlm-mode = "0x000,xfi";
86 reg = <0x0>;
87 compatible = "aquantia,aqr105", "ethernet-phy-ieee802.3-c45";
88 };
89 };
90 };
91
92 rgx0 {
93 rgmii00 {
94 reg = <0>;
95 local-mac-address = [00 00 00 00 00 00];
96 phy-handle = <&rgmii00>;
97 };
98 };
99
100 bgx0 {
101 /* typename+qlm+typenumber eg :
102 qsgmii+bgx0+sgmmi0
103 */
104 qsgmii00 {
105 reg = <0>;
106 qlm-mode = "0x000,qsgmii";
107 local-mac-address = [00 00 00 00 00 00];
108 phy-handle = <&qsgmii00>;
109 };
110 qsgmii01 {
111 reg = <1>;
112 qlm-mode = "0x001,qsgmii";
113 local-mac-address = [00 00 00 00 00 00];
114 phy-handle = <&qsgmii01>;
115 };
116 qsgmii02 {
117 reg = <2>;
118 qlm-mode = "0x002,qsgmii";
119 local-mac-address = [00 00 00 00 00 00];
120 phy-handle = <&qsgmii02>;
121 };
122 qsgmii03 {
123 reg = <3>;
124 qlm-mode = "0x003,qsgmii";
125 local-mac-address = [00 00 00 00 00 00];
126 phy-handle = <&qsgmii03>;
127 };
128
129 xfi00 {
130 reg = <0>;
131 qlm-mode = "0x000,xfi";
132 local-mac-address = [00 00 00 00 00 00];
133 phy-handle = <&xfi00>;
134 };
135 };
136
137 bgx1 {
138 xfi10 {
139 reg = <0>;
140 qlm-mode = "0x010,xfi";
141 local-mac-address = [00 00 00 00 00 00];
142 };
143
144 xfi11 {
145 reg = <1>;
146 qlm-mode = "0x011,xfi";
147 local-mac-address = [00 00 00 00 00 00];
148 };
149 };
150
151
152};
153
154&mmc_1_4 {
155 /* NOTE: the BDK is responsible for swapping the two slots.
156 * Unfortunately there does not appear to be any way to read the
157 * position of SW2-7 in software.
158 */
159 /* Power on GPIO 8, active high, shared */
160 power-gpios = <&gpio_6_0 8 0>;
161
162 mmc-slot@0 {
163 compatible = "cavium,thunder-8890-mmc-slot";
164 reg = <0>;
165 /* Only 3.3v is supported */
166 voltage-ranges = <3300 3300>;
167 max-frequency = <26000000>;
168 /* 1.8v is not supported */
169 no-1-8-v;
170 /* Bus width is only 4 bits maximum */
171 bus-width = <4>;
172 /* No write-protect switch is present */
173 disable-wp;
174 /* There is no card detection available; polling must be used. */
175 broken-cd;
176 /* SD UHS SDR25 is supported */
177 sd-uhs-sdr25;
178 /* SD UHS SDR50 is supported */
179 sd-uhs-ddr50;
180 /* SD UHS DDR50 is supported */
181 sd-uhs-sdr50;
182 /* High-speed mode is supported */
183 cap-sd-highspeed;
184 /* speed up device probing */
185 no-sdio;
186 no-mmc;
187 };
188 mmc-slot@1 {
189 compatible = "cavium,thunder-8890-mmc-slot";
190 reg = <1>;
191 voltage-ranges = <3300 3300>;
192 max-frequency = <26000000>;
193 /* 1.8v is not supported */
194 no-1-8-v;
195 /* Bus width is only 8 bits maximum */
196 bus-width = <8>;
197 /* No write-protect switch is present */
198 disable-wp;
199 /* There is no card detection available; polling must be used. */
200 broken-cd;
201 /* High-speed mode is supported */
202 cap-mmc-highspeed;
203 /* eMMC device is soldered onto the board */
204 non-removable;
205 /* speed up device probing */
206 no-sdio;
207 no-sd;
208 };
209};
210
211&i2c_9_0 {
212 /* another pca9535 at 0x20 is only visible via jtag */
213 gpio1: gpio-i2c@21 {
214 compatible = "nxp,pca9535";
215 gpio-controller;
216 reg = <0x21>;
217 gpio_base = <48>;
218 pins = <48 16>;
219 ngpios = <16>; // standard
220 n_gpios = <16>; // deprecated, driver required
221 #gpio-cells = <2>;
222 };
223
224 gpio2: gpio-i2c@22 {
225 compatible = "nxp,pca9535";
226 gpio-controller;
227 reg = <0x22>;
228 gpio_base = <64>;
229 pins = <64 16>;
230 ngpios = <16>; // standard
231 n_gpios = <16>; // deprecated, driver required
232 #gpio-cells = <2>;
233 };
234};
235
236&i2c_9_1 {
237 rom@54 {
238 compatible = "atmel,24c256";
239 reg = <0x54>;
240 pagesize = <64>;
241 };
242
243 rtc@68 {
244 compatible = "isil,isl12057";
245 reg = <0x68>;
246 };
247};
248
249&spi_7_0 {
250 flash@0 {
251 compatible = "micron,n25q128a13", "spi-flash";
252 reg = <0x0>;
253 spi-max-frequency = <16000000>;
254 #address-cells = <1>;
255 #size-cells = <1>;
256 };
257};
258
259&nfc {
260 nand@1 {
261 reg = <0x1>;
262 nand-ecc-mode = "hw";
263 };
264};
265
266&tdm {
267 // need corresponding mmc_etc.enable = <&gpio_6_0 39 1>;
268 pcm-enable-gpios = <&gpio_6_0 39 0>;
269};
270
271&spi_7_0 {
272 spi-mux-gpios = <&gpio1 4 1>;
273
274 flash@0 {
275 compatible = "jedec,spi-nor";
276 reg = <0x0>;
277 spi-max-frequency = <16000000>;
278 #address-cells = <1>;
279 #size-cells = <1>;
280 };
281
282 slic@4 {
283 compatible = "silabs,si32260", "linux,spidev";
284 reg = <4>;
285 spi-max-frequency = <2500000>;
286 reset-gpios = <&gpio1 0 1>;
287 irq-gpios = <&gpio_6_0 13>;
288 tx = <&tdm 0>;
289 rx = <&tdm 1>;
290 };
291
292 framer@5 {
293 compatible = "maxim,ds26521", "linux,spidev";
294 reg = <5>;
295 spi-max-frequency = <2500000>;
296 reset-gpios = <&gpio_6_0 11 1>;
297 irq-gpios = <&gpio_6_0 14>;
298 tx = <&tdm 2>;
299 rx = <&tdm 3>;
300 };
301};
diff --git a/recipes-kernel/linux/linux-cavium_4.9.bb b/recipes-kernel/linux/linux-cavium_4.9.bb
new file mode 100644
index 0000000..c5a4595
--- /dev/null
+++ b/recipes-kernel/linux/linux-cavium_4.9.bb
@@ -0,0 +1,36 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2
3require recipes-kernel/linux/linux-yocto.inc
4require recipes-kernel/linux/linux-deploy-kconfig.inc
5
6# board specific branches
7KBRANCH_cn8304 ?= "cavium-4.9"
8KBRANCH_qemuarm64 ?= "cavium-4.9"
9
10SRCREV_machine_cn8304 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09"
11SRCREV_machine_qemuarm64 ?= "3804edd9db9c0d3e0e8301f13bdc569bcc0ebd09"
12SRCREV_metaenea ?= "85a500385477e07d144fc3fcfa4ec62e6aabc8e8"
13KENEABRANCH = "cavium-4.9"
14
15SRC_URI = "git://git@git.enea.com/linux/linux-cavium.git;protocol=ssh;name=machine;branch=${KBRANCH} \
16 git://git@git.enea.com/linux/enea-kernel-cache.git;protocol=ssh;type=kmeta;name=metaenea;branch=${KENEABRANCH};destsuffix=enea-kernel-cache \
17 file://dts \
18 "
19
20LINUX_KERNEL_TYPE = "tiny"
21LINUX_VERSION ?= "4.9.0"
22LINUX_VERSION_EXTENSION = "-cavium-${LINUX_KERNEL_TYPE}"
23PV = "4.9-octeontx.sdk.6.1.0.p2.build.17"
24
25KERNEL_DEVICETREE_cn8304 = "cavium/ebb8304-linux.dtb"
26
27COMPATIBLE_MACHINE = "cn8304|qemuarm64"
28KMACHINE_cn8304 = "cavium-cn8304"
29KMACHINE_qemuarm64 = "cavium-cn8304"
30
31KERNEL_FEATURES_append_cn8304 += "features/net/thunderx/thunderx_nic.scc"
32
33do_patch_append() {
34 install -D ${S}/arch/${ARCH}/boot/dts
35 install ${WORKDIR}/dts/* ${S}/arch/${ARCH}/boot/dts/cavium/
36}
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-05-02 05:11:49 +0000