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authorAndreas Wellving <andreas.wellving@enea.com>2018-10-12 07:54:40 +0200
committerAndreas Wellving <Andreas.Wellving@enea.com>2018-10-12 11:26:48 +0200
commit102d3d2fa1ecd62f6ed940e754b929446fb19b6d (patch)
treeb053329d66b8148c58279be46de171ac0856a2a9
parent75d339a54995a57e8572be3476f2de7780974ebd (diff)
downloadenea-kernel-cache-102d3d2fa1ecd62f6ed940e754b929446fb19b6d.tar.gz
x86: CVE-2018-15572
x86/speculation: Protect against userspace-userspace spectreRSB References: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-4.9.y&id=6455f41db5206cf46b623be071a0aa308c183642 Change-Id: I431a85f8cf64c89107fbc537c8a94fc9dddee1da Signed-off-by: Andreas Wellving <andreas.wellving@enea.com>
-rw-r--r--patches/cve/4.9.x.scc3
-rw-r--r--patches/cve/CVE-2018-15572-x86-speculation-Protect-against-userspace-userspace-.patch95
2 files changed, 98 insertions, 0 deletions
diff --git a/patches/cve/4.9.x.scc b/patches/cve/4.9.x.scc
index 7283a43..b4a473e 100644
--- a/patches/cve/4.9.x.scc
+++ b/patches/cve/4.9.x.scc
@@ -3,3 +3,6 @@ patch CVE-2018-14734-infiniband-fix-a-possible-use-after-free-bug.patch
3 3
4#CVEs fixed in 4.9.119: 4#CVEs fixed in 4.9.119:
5patch CVE-2018-12233-jfs-Fix-inconsistency-between-memory-allocation-and-.patch 5patch CVE-2018-12233-jfs-Fix-inconsistency-between-memory-allocation-and-.patch
6
7#CVEs fixed in 4.9.120:
8patch CVE-2018-15572-x86-speculation-Protect-against-userspace-userspace-.patch
diff --git a/patches/cve/CVE-2018-15572-x86-speculation-Protect-against-userspace-userspace-.patch b/patches/cve/CVE-2018-15572-x86-speculation-Protect-against-userspace-userspace-.patch
new file mode 100644
index 0000000..31c3de6
--- /dev/null
+++ b/patches/cve/CVE-2018-15572-x86-speculation-Protect-against-userspace-userspace-.patch
@@ -0,0 +1,95 @@
1Date: Thu, 11 Oct 2018 05:34:10 +0200
2Subject: [PATCH] x86/speculation: Protect against userspace-userspace
3 spectreRSB
4
5The article "Spectre Returns! Speculation Attacks using the Return Stack
6Buffer" [1] describes two new (sub-)variants of spectrev2-like attacks,
7making use solely of the RSB contents even on CPUs that don't fallback to
8BTB on RSB underflow (Skylake+).
9
10Mitigate userspace-userspace attacks by always unconditionally filling RSB on
11context switch when the generic spectrev2 mitigation has been enabled.
12
13[1] https://arxiv.org/pdf/1807.07940.pdf
14
15CVE: CVE-2018-15572
16Upstream-Status: Backport
17
18Signed-off-by: Jiri Kosina <jkosina@suse.cz>
19Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
20Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
21Acked-by: Tim Chen <tim.c.chen@linux.intel.com>
22Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
23Cc: Borislav Petkov <bp@suse.de>
24Cc: David Woodhouse <dwmw@amazon.co.uk>
25Cc: Peter Zijlstra <peterz@infradead.org>
26Cc: Linus Torvalds <torvalds@linux-foundation.org>
27Cc: stable@vger.kernel.org
28Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1807261308190.997@cbobk.fhfr.pm
29Signed-off-by: Andreas Wellving <andreas.wellving@enea.com>
30---
31 arch/x86/kernel/cpu/bugs.c | 40 ++++++++--------------------------------
32 1 file changed, 8 insertions(+), 32 deletions(-)
33
34diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
35index 86af9b1..a416723 100644
36--- a/arch/x86/kernel/cpu/bugs.c
37+++ b/arch/x86/kernel/cpu/bugs.c
38@@ -310,23 +310,6 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
39 return cmd;
40 }
41
42-/* Check for Skylake-like CPUs (for RSB handling) */
43-static bool __init is_skylake_era(void)
44-{
45- if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
46- boot_cpu_data.x86 == 6) {
47- switch (boot_cpu_data.x86_model) {
48- case INTEL_FAM6_SKYLAKE_MOBILE:
49- case INTEL_FAM6_SKYLAKE_DESKTOP:
50- case INTEL_FAM6_SKYLAKE_X:
51- case INTEL_FAM6_KABYLAKE_MOBILE:
52- case INTEL_FAM6_KABYLAKE_DESKTOP:
53- return true;
54- }
55- }
56- return false;
57-}
58-
59 static void __init spectre_v2_select_mitigation(void)
60 {
61 enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline();
62@@ -387,22 +370,15 @@ static void __init spectre_v2_select_mitigation(void)
63 pr_info("%s\n", spectre_v2_strings[mode]);
64
65 /*
66- * If neither SMEP nor PTI are available, there is a risk of
67- * hitting userspace addresses in the RSB after a context switch
68- * from a shallow call stack to a deeper one. To prevent this fill
69- * the entire RSB, even when using IBRS.
70- *
71- * Skylake era CPUs have a separate issue with *underflow* of the
72- * RSB, when they will predict 'ret' targets from the generic BTB.
73- * The proper mitigation for this is IBRS. If IBRS is not supported
74- * or deactivated in favour of retpolines the RSB fill on context
75- * switch is required.
76+ * If spectre v2 protection has been enabled, unconditionally fill
77+ * RSB during a context switch; this protects against two independent
78+ * issues:
79+ *
80+ * - RSB underflow (and switch to BTB) on Skylake+
81+ * - SpectreRSB variant of spectre v2 on X86_BUG_SPECTRE_V2 CPUs
82 */
83- if ((!boot_cpu_has(X86_FEATURE_KAISER) &&
84- !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
85- setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
86- pr_info("Spectre v2 mitigation: Filling RSB on context switch\n");
87- }
88+ setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
89+ pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
90
91 /* Initialize Indirect Branch Prediction Barrier if supported */
92 if (boot_cpu_has(X86_FEATURE_IBPB)) {
93--
94
95